165BGA Search Results

Contextual Info: Product Preview GS832218 B/E /GS832236(B/E)/GS832272(C) 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs 119-, 165-, & 209-Pin BGA Commercial Temp Industrial Temp Features Flow Through/Pipeline Reads • FT pin for user-configurable flow through or pipeline operation

Contextual Info: GS8322Z18 B/E /GS8322Z36(B/E)/GS8322Z72(C) 119, 165 & 209 BGA Commercial Temp Industrial Temp 36Mb Pipelined and Flow Through Synchronous NBT SRAM Features 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Because it is a synchronous device, address, data inputs, and

Contextual Info: GS88218/36CB/D-333/300/250/200/150 119- and 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs Features • FT pin for user-configurable flow through or pipeline operation

Contextual Info: Preliminary GS81302S08/09/18/36E-333/300/250/200/167 144Mb SigmaSIOTM DDR -II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package

Contextual Info: GS88218/36CB/D-xxxI 119- and 165-Bump BGA Industrial Temp 333 MHz–150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs Features • FT pin for user-configurable flow through or pipeline operation • Single/Dual Cycle Deselect selectable

Contextual Info: CY7C1484V25 CY7C1485V25 72-Mbit 2M x 36/4M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200, and 167 MHz • Registered inputs and outputs for pipelined operation

165BGA

Contextual Info: CY7C1484V25 CY7C1485V25 PRELIMINARY 72-Mbit 2M x 36/4M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200, and 167 MHz • Registered inputs and outputs for pipelined operation

Contextual Info: GS8644Z18E/GS8644Z36E 165-Pin BGA Commercial Temp Industrial Temp 72Mb Pipelined and Flow Through Synchronous NBT SRAM Features 250 MHz–133MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Because it is a synchronous device, address, data inputs, and read/write control inputs are captured on the rising edge of the

Contextual Info: GS81302S08/09/18/36E-375/350/333/300/250 144Mb SigmaSIOTM DDR -II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 375 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package

GS88218CB-250

Abstract: GS88236CD-200I GS88236CD
Contextual Info: GS88218/36CB/D-333/300/250/200/150 119- and 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs Features • FT pin for user-configurable flow through or pipeline operation

GS8322Z18

Abstract: GS8322Z72 d 209 l
Contextual Info: GS8322Z18 B/E /GS8322Z36(B/E)/GS8322Z72(C) 119, 165 & 209 BGA Commercial Temp Industrial Temp 36Mb Pipelined and Flow Through Synchronous NBT SRAM Features 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Because it is a synchronous device, address, data inputs, and

Contextual Info: GS88218/36CB/D-xxx 119- and 165-Bump BGA Commercial Temp 333 MHz–150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs Features • FT pin for user-configurable flow through or pipeline operation • Single/Dual Cycle Deselect selectable

Contextual Info: GS81302S08/09/18/36E-375/350/333/300/250 144Mb SigmaSIOTM DDR -II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 375 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package

Contextual Info: Preliminary GS832218 B/E /GS832236(B/E)/GS832272(C) 119-, 165-, & 209-Pin BGA Commercial Temp Industrial Temp 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs Features 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Flow Through/Pipeline Reads

112-011A

Contextual Info: GS8662Q08/09/18/36E-278/250/200/167 165-Bump BGA Commercial Temp Industrial Temp 278 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 72Mb SigmaQuad-II Burst of 2 SRAM Clocking and Addressing Schemes • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package

Contextual Info: Preliminary GS832218 B/E /GS832236(B/E)/GS832272(C) 119-, 165-, & 209-Pin BGA Commercial Temp Industrial Temp 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs Features 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Flow Through/Pipeline Reads

Contextual Info: GS8322Z18 B/E /GS8322Z36(B/E)/GS8322Z72(C) 119, 165 & 209 BGA Commercial Temp Industrial Temp 36Mb Pipelined and Flow Through Synchronous NBT SRAM Features 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Because it is a synchronous device, address, data inputs, and

GS832218

Abstract: GS832218B-200 GS832218B-225 GS832218B-250 GS832272
Contextual Info: Preliminary GS832218 B/E /GS832236(B/E)/GS832272(C) 119-, 165-, & 209-Pin BGA Commercial Temp Industrial Temp 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs Features 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Flow Through/Pipeline Reads

Contextual Info: GS88218/36CB/D-333/300/250/200/150 119- and 165-Bump BGA Commercial Temp Industrial Temp Features • • • • • • • • • • • • • • • 333 MHz–150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs

Contextual Info: CY7C1484V33 CY7C1485V33 72-Mbit 2M x 36/4M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 167 MHz • Registered inputs and outputs for pipelined operation

j123

Contextual Info: ORCA ORSPI4 Evaluation Board User’s Guide July 2004 ebug06_01 ORCA ORSPI4 Evaluation Board User’s Guide Lattice Semiconductor Introduction This user’s guide describes the Lattice evaluation board for the ORSPI4 device, a stand-alone evaluation PCB that

AN1064

Abstract: CY7C1484V33 CY7C1485V33
Contextual Info: CY7C1484V33 CY7C1485V33 72-Mbit 2M x 36/4M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • • • • • • • • • • • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, and 167 MHz

AN1064

Abstract: CY7C1484V25 CY7C1485V25
Contextual Info: CY7C1484V25 CY7C1485V25 72-Mbit 2M x 36/4M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • • • • • • • • • • • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, and 167 MHz

CY7C1444AV25

Abstract: CY7C1445AV25
Contextual Info: CY7C1444AV25 CY7C1445AV25 PRELIMINARY 36-Mbit 1M x 36/2M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200, and 167 MHz • Registered inputs and outputs for pipelined operation