172PS Search Results

MAX9321ESA

Contextual Info: 19-2152; Rev 2; 11/02 Differential LVPECL/LVECL/HSTL Receiver/Drivers Features ♦ Improved Second Source of the MC10LVEP16 MAX9321 The MAX9321/MAX9321A feature ultra-low propagation delay (172ps) and part-to-part skew (20ps) with 24mA maximum supply current, making these devices ideal

Contextual Info: 19-2384; Rev 0; 4/02 Differential PECL/ECL/LVPECL/LVECL Receiver/Driver The MAX9321B features ultra-low propagation delay 172ps and part-to-part skew (20ps) with 24mA maximum supply current, making this device ideal for clock buffering or repeating. For interfacing to differential PECL

IS46TR

Abstract: IS43TR82560A DDR3 DRAM 2GB 128Mx16 96BALL FBGA "2Gb DDR3 SDRAM"
Contextual Info: IS43/46TR16128A/AL, IS43/46TR82560A/AL 256Mx8, 128Mx16 2Gb DDR3 SDRAM ADVANCED INFORMATION MAY 2012 FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V  Low Voltage L : VDD and VDDQ = 1.35V + 0.1V, -0.067V        

NT5CB64M16AP-CF

Abstract: nt5cb64m16 NT5CB64M16AP-CG NT5CB64M16AP nanya NT5CB64M16AP NT5CB64m NT5CB64M16AP-BE nt5cb64m16ap-dh MPR 20 20 CF RESISTOR NT5CB64M16AP-AC
Contextual Info: 1Gb DDR3 SDRAM A-Die NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP Feature  Write Leveling  1.5V ± 0.075V JEDEC Standard Power Supply  OCD Calibration  8 Internal memory banks (BA0- BA2)  Dynamic ODT (Rtt_Nom & Rtt_WR)  Differential clock input (CK, )

216-ball

Abstract: Dual LPDDR2 LPDDR2 SDRAM micron LPDDR2 1Gb Memory MT42L128M64D4 MR63 Micron LPDDR2 lpddr2 168 lp-ddr2 MT42L256M32
Contextual Info: 2Gb: x16, x32 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L128M16D1, MT42L64M32D1, MT42L64M64D2, MT42L128M32D2, MT42L256M32D4, MT42L128M64D4 MT42L96M64D3, MT42L192M32D3 Features Options • VDD2: 1.2V • Configuration – 16 Meg x 16 x 8 banks x 1 die

MAX9321ESA

Contextual Info: 19-2152; Rev 0; 8/01 Differential LVPECL/LVECL/HSTL Receiver/Drivers Features ♦ Improved Second Source of the MC10LVEP16 MAX9321 Both devices are offered in space-saving 8-pin SOT23 and industry-standard SO and TSSOP packages. ♦ Available in Thermally Enhanced Exposed-Pad

Contextual Info: IS43/46TR16640A, IS43/46TR16640AL IS43/46TR81280A, IS43/46TR81280AL 128MX8, 64MX16 1Gb DDR3 SDRAM NOVEMBER 2013 FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V  Low Voltage L : VDD and VDDQ = 1.35V + 0.1V, -0.067V       

Contextual Info: IS43/46TR16128A, IS43/46TR16128AL, IS43/46TR82560A, IS43/46TR82560AL 256Mx8, 128Mx16 2Gb DDR3 SDRAM NOVEMBER 2013 FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V  Low Voltage L : VDD and VDDQ = 1.35V + 0.1V, -0.067V      

Contextual Info: IS43/46TR16640B, IS43/46TR16640BL IS43/46TR81280B, IS43/46TR81280BL 128MX8, 64MX16 1Gb DDR3 SDRAM NOVEMBER 2014 FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V  Low Voltage L : VDD and VDDQ = 1.35V + 0.1V, -0.067V  Refresh Interval: 7.8 us (8192 cycles/64 ms) Tc= -40°C to 85°C

MAX9321ESA

Abstract: MAX9321 MAX9321A MAX9321AEKA-T MAX9321AESA MAX9321AEUA MAX9321EKA-T MAX9321EUA MC10LVEP16
Contextual Info: 19-2152; Rev 2; 11/02 Differential LVPECL/LVECL/HSTL Receiver/Drivers Features ♦ Improved Second Source of the MC10LVEP16 MAX9321 Both devices are offered in space-saving 8-pin SOT23, SO, and µMAX packages. ♦ Available in Thermally Enhanced Exposed-Pad

Contextual Info: SG572568FU8EWUU June 28, 2010 Ordering Information Part Numbers Description Module Speed SG572568FH8EWLC 256Mx72 2GB , DDR3, 204-pin Registered SO-RDIMM, Parity, ECC, 128Mx8 Based, DDR3-1066-777, 1.5V, 30.00mm, Green Module (RoHS Compliant). PC3-8500 @ CL 7, 8

Contextual Info: DATA SHEET 1G bits DDR3 SDRAM EDJ1108BABG 128M words x 8 bits EDJ1116BABG (64M words × 16 bits) Specifications Features • Density: 1G bits Organization  16M words × 8 bits × 8 banks (EDJ1108BABG)  8M words × 16 bits × 8 banks (EDJ1116BABG)

Contextual Info: IS43/46TR16256A, IS43/46TR16256AL, IS43/46TR85120A, IS43/46TR85120AL 512Mx8, 256Mx16 4Gb DDR3 SDRAM ADVANCED INFORMATION DECEMBER 2012 FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V • Low Voltage L : VDD and VDDQ = 1.35V + 0.1V, -0.067V •

NT5CB128M8CN

Abstract: NT5CB256M4CN NT5CB128
Contextual Info: 1Gb DDR3 SDRAM C-Die NT5CB256M4CN / NT5CB128M8CN Feature  1.5V ± 0.075V JEDEC Standard Power Supply  Write Leveling  8 Internal memory banks (BA0- BA2)  OCD Calibration  Differential clock input (CK, )  Dynamic ODT (Rtt_Nom & Rtt_WR)

NT5CC256

Contextual Info: 2Gb DDR3 SDRAM D-Die NT5CB512M4DN / NT5CB256M8DN NT5CC512M4DN / NT5CC256M8DN Feature  1.5V ± 0.075V / 1.35V -0.0675V/+0.1V JEDEC Standard Power Supply  Output Driver Impedance Control  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)

Contextual Info: IS43/46LD16160A IS43/46LD32800A 256Mb x16, x32 Mobile LPDDR2 S4 SDRAM ADVANCED INFORMATION JULY 2014 FEATURES description • Low-voltage Core and I/O Power Supplies VDD2 = 1.14-1.30V, VDDCA/VDDQ = 1.14-1.30V, VDD1 = 1.70-1.95V • High Speed Un-terminated Logic(HSUL_12) I/O

EDJ4208BASE-DJ-F

Abstract: EDJ4208BASE EDJ4208BASE-GN-F 1024M ELPIDA DDR3 User
Contextual Info: DATA SHEET 4G bits DDR3 SDRAM EDJ4204BASE 1024M words x 4 bits EDJ4208BASE (512M words × 8 bits) Specifications Features • Density: 4G bits • Organization  128M words × 4 bits × 8 banks (EDJ4204BASE)  64M words × 8 bits × 8 banks (EDJ4208BASE)

M1012

Contextual Info: 4Gb: x16, x32 Mobile LPDDR2 SDRAM S4 Features Mobile LPDDR2 SDRAM MT42L256M16D1, MT42L128M32D1, MT42L256M32D2, MT42L128M64D2, MT42L512M32D4, MT42L192M64D3, MT42L256M64D4 Features Options • VDD2: 1.2V • Configuration – 32 Meg x 16 x 8 banks x 1 die – 16 Meg x 32 x 8 banks x 1 die

IS43TR16640A

Contextual Info: IS43/46TR16640A, IS43/46TR16640AL IS43/46TR81280A , IS43/46TR81280AL 128MX8, 64MX16 1Gb DDR3 SDRAM ADVANCED INFORMATION NOVEMBER 2012 FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V • Low Voltage L : VDD and VDDQ = 1.35V + 0.1V, -0.067V •

EDJ4208EASE-DJ

Abstract: EDJ4208EASE-DJ-F 1024M DDR3 4G SPD DDR3L-1066F DDR3L-1333
Contextual Info: DATA SHEET 4G bits DDR3L SDRAM EDJ4204EASE 1024M words x 4 bits EDJ4208EASE (512M words × 8 bits) Specifications Features • Density: 4G bits • Organization  128M words × 4 bits × 8 banks (EDJ4204EASE)  64M words × 8 bits × 8 banks (EDJ4208EASE)

EDJ4216BASE

Abstract: E1646E41 105WR
Contextual Info: DATA SHEET 4G bits DDR3 SDRAM EDJ4216BASE 256M words x 16 bits Specifications Features • Density: 4G bits • Organization: 32M words × 16 bits × 8 banks • Package: 96-ball FBGA ⎯ Lead-free (RoHS compliant) and Halogen-free • Power supply: VDD, VDDQ = 1.5V ± 0.075V

EDJ2104EDBG

Abstract: ELPIDA DDR3 DDR3L-1066 edj2108EDBG E1797E41 EDJ2108EDBG-DJ-F EDJ2108EDBG-GN-F
Contextual Info: DATA SHEET 2G bits DDR3L SDRAM EDJ2104EDBG 512M words x 4 bits EDJ2108EDBG (256M words × 8 bits) Specifications Features • Density: 2G bits • Organization  64M words × 4 bits × 8 banks (EDJ2104EDBG)  32M words × 8 bits × 8 banks (EDJ2108EDBG)

J1108

Contextual Info: PRELIMINARY DATA SHEET 1G bits DDR3 SDRAM EDJ1108BABG 128M words x 8 bits EDJ1116BABG (64M words × 16 bits) Specifications Features • Density: 1G bits Organization  16M words × 8 bits × 8 banks (EDJ1108BABG)  8M words × 16 bits × 8 banks (EDJ1116BABG)

E1629E20

Abstract: EDJ1108BFBG-DJ-F
Contextual Info: PRELIMINARY DATA SHEET 1G bits DDR3 SDRAM EDJ1104BFBG 256M words x 4 bits EDJ1108BFBG (128M words × 8 bits) Specifications Features • Density: 1G bits • Organization ⎯ 32M words × 4 bits × 8 banks (EDJ1104BFBG) ⎯ 16M words × 8 bits × 8 banks (EDJ1108BFBG)