RATE32 Search Results

NT5CB64M16AP-CF

Abstract: nt5cb64m16 NT5CB64M16AP-CG NT5CB64M16AP nanya NT5CB64M16AP NT5CB64m NT5CB64M16AP-BE nt5cb64m16ap-dh MPR 20 20 CF RESISTOR NT5CB64M16AP-AC
Contextual Info: 1Gb DDR3 SDRAM A-Die NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP Feature  Write Leveling  1.5V ± 0.075V JEDEC Standard Power Supply  OCD Calibration  8 Internal memory banks (BA0- BA2)  Dynamic ODT (Rtt_Nom & Rtt_WR)  Differential clock input (CK, )

NT5CB128M8CN

Abstract: NT5CB256M4CN NT5CB128
Contextual Info: 1Gb DDR3 SDRAM C-Die NT5CB256M4CN / NT5CB128M8CN Feature  1.5V ± 0.075V JEDEC Standard Power Supply  Write Leveling  8 Internal memory banks (BA0- BA2)  OCD Calibration  Differential clock input (CK, )  Dynamic ODT (Rtt_Nom & Rtt_WR)

NT5CB256M8DN

Abstract: NT5CB256m tl 555 c "2Gb DDR3 SDRAM" NT5CB256M8 NT5CB256 NT5CC256M8 NT5CC256
Contextual Info: 2Gb DDR3 SDRAM D-Die NT5CB512M4DN / NT5CB256M8DN NT5CC512M4DN / NT5CC256M8DN Feature  1.5V ± 0.075V / 1.35V -0.0675V/+0.1V JEDEC Standard Power Supply  Output Driver Impedance Control  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)

NT5CB256M8GN

Abstract: NT5CC256M8GN NT5CB256M8GN-DI NT5CC256M8GN-D NT5CC512M4GN NT5CC512M4GN-CG NT5CB256M8GN-CG "2Gb DDR3 SDRAM" NT5C NT5CB256M8
Contextual Info: 2Gb DDR3 SDRAM G-Die NT5CB512M4GN / NT5CB256M8GN NT5CC512M4GN / NT5CC256M8GN Feature  VDD = VDDQ = 1.5V ± 0.075V JEDEC Standard  Programmable Burst Length: 4, 8 Power Supply  8n-bit prefetch architecture VDD = VDDQ = 1.35V -0.0675V/+0.1V  Output Driver Impedance Control

NT5CC256

Contextual Info: 2Gb DDR3 SDRAM D-Die NT5CB512M4DN / NT5CB256M8DN NT5CC512M4DN / NT5CC256M8DN Feature  1.5V ± 0.075V / 1.35V -0.0675V/+0.1V JEDEC Standard Power Supply  Output Driver Impedance Control  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)

N2CB2G40DN

Contextual Info: 2Gb DDR3 SDRAM D-Die N2CB2G40DN / N2CB2G80DN N2CC2G40DN / N2CC2G80DN Feature  1.5V ± 0.075V / 1.35V -0.0675V/+0.1V JEDEC Standard Power Supply  Output Driver Impedance Control  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)

NT5CC256

Abstract: NT5CB256M8GN- CG
Contextual Info: 2Gb DDR3 SDRAM G-Die NT5CB512M4GN / NT5CB256M8GN NT5CC512M4GN / NT5CC256M8GN Feature  1.35V -0.0675V/+0.1V & 1.5V ± 0.075V JEDEC  Output Driver Impedance Control Standard Power Supply  Differential bidirectional data strobe  8 Internal memory banks (BA0- BA2)

NT5CB256

Abstract: srt 8n JESD79-3 NT5CB128M8CN NT5CB128M8CN-CG NT5CB128M TI ddr3 controller datasheet NT5CB128
Contextual Info: 1Gb DDR3 SDRAM C-Die NT5CB256M4CN / NT5CB128M8CN Feature  1.5V ± 0.075V JEDEC Standard Power Supply  Write Leveling  8 Internal memory banks (BA0- BA2)  OCD Calibration  Differential clock input (CK, )  Dynamic ODT (Rtt_Nom & Rtt_WR)

nt5cb64m16

Abstract: NT5CB64m NT5CB64M16AP NT5CB64 NT5CB64M16AP-CF NT5CB64M16AP-BE nanya NT5CB64M16AP NT5CB256M4AN NT5CB64M16AP-CG NT5CB64M16AP-AC
Contextual Info: 1Gb DDR3 SDRAM A-Die NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP Feature  Write Leveling  1.5V ± 0.075V JEDEC Standard Power Supply  OCD Calibration  8 Internal memory banks (BA0- BA2)  Dynamic ODT (Rtt_Nom & Rtt_WR)  Differential clock input (CK, )

NT5CB128M16BP-DI

Abstract: NT5CB256M8 nt5cb128m16 NT5CC128M16BP NT5CB256M8BN NT5CB512M4BN NT5CB128M NT5CB256M8BN-DI NT5CB128 NT5CC256
Contextual Info: 2Gb DDR3 SDRAM B-Die NT5CB512M4BN / NT5CB256M8BN / NT5CB128M16BP NT5CC512M4BN / NT5CC256M8BN / NT5CC128M16BP Feature  1.5V ± 0.075V / 1.35V -0.0675V/+0.1V JEDEC Standard Power Supply  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)

NT5CB1024M4BN-DI

Abstract: DDR2 module Dimensions NT5CC256
Contextual Info: 4Gb DDR3 SDRAM B-Die NT5CB1024M4BN / NT5CB512M8BN / NT5CB256M16BP NT5CC1024M4BN / NT5CC512M8BN / NT5CC256M16BP Feature  VDD = VDDQ = 1.5V ± 0.075V JEDEC Standard  8n-bit prefetch architecture Power Supply  Output Driver Impedance Control VDD = VDDQ = 1.35V -0.0675V/+0.1V

NT5CB256M16

Abstract: NT5CC256M16CP-DI NT5CB256M16CP NT5CB256M16CP-DI NT5CC512M8 NT5CB512M8CN-CG NT5CC256M16 wrs4 NT5CB512M8CN NT5CB256
Contextual Info: 4Gb DDR3 SDRAM C-Die NT5CB1024M4CN / NT5CB512M8CN / NT5CB256M16CP NT5CC1024M4CN / NT5CC512M8CN / NT5CC256M16CP Feature  VDD = VDDQ = 1.5V ± 0.075V JEDEC Standard  8n-bit prefetch architecture Power Supply  Output Driver Impedance Control VDD = VDDQ = 1.35V -0.0675V/+0.1V

DDR3-1866-CL12

Abstract: NT5CB256M8GN-DI
Contextual Info: 2Gb DDR3 SDRAM G-Die NT5CB256M8GN / NT5CC256M8GN Feature Table 1: CAS Latency Frequency Speed Bins -BE* -CG/CGI* -DI* -EJ* DDR3 L -1066-CL7 DDR3 (L)-1333-CL9 DDR3(L)-1600-CL11 Units DDR3-1866-CL12 Parameter Min. Max. Min. Max. Min. Max. Min. Max. tCK(Avg.)

Contextual Info: Consumer Microcircuits Limited PRODUCT INFORMATION r v e n n Continuously Variable Slope r X b 09 Delta Modulation CVSD Codec Publication D /6 0 9 /4 July 1 9 94 Features/Applications • Full Duplex CVSD Codec • On-Chip Input and Output Filters • Selectable 3 or 4-Bit Compand

NT5CB128

Abstract: NT5CB128M NT5CB256 NT5CB128M8CN-CG NT5CB256m NT5CB128M8 NT5CB128M8CN srt 8n JESD79-3 Nanya DDR3
Contextual Info: 1Gb DDR3 SDRAM C-Die NT5CB256M4CN / NT5CB128M8CN Feature  1.5V ± 0.075V JEDEC Standard Power Supply  Write Leveling  8 Internal memory banks (BA0- BA2)  OCD Calibration  Differential clock input (CK, )  Dynamic ODT (Rtt_Nom & Rtt_WR)

nt5cb64m16

Abstract: NT5CB64M16AP-CF NT5CB64M16AP-AC NT5CB64M16AP NT5CB64M16AP-BE nt5cb128m8an-cg NT5CB128M8AN-DG
Contextual Info: 1Gb DDR3 SDRAM A-Die NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP Feature  Write Leveling  1.5V ± 0.75V JEDEC Standard Power Supply  OCD Calibration  8 Internal memory banks (BA0- BA2)  Dynamic ODT (Rtt_Nom & Rtt_WR)  Differential clock input (CK, )

NT5CC256

Contextual Info: 2Gb DDR3 SDRAM G-Die NT5CB512M4GN / NT5CB256M8GN NT5CC512M4GN / NT5CC256M8GN Feature  1.35V -0.0675V/+0.1V & 1.5V ± 0.075V JEDEC  Output Driver Impedance Control Standard Power Supply  Differential bidirectional data strobe  8 Internal memory banks (BA0- BA2)

NT5CB256M4AN-BE

Contextual Info: 1Gb DDR3 SDRAM A-Die NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP Feature  Write Leveling  1.5V ± 0.75V JEDEC Standard Power Supply  OCD Calibration  8 Internal memory banks (BA0- BA2)  Dynamic ODT (Rtt_Nom & Rtt_WR)  Differential clock input (CK, )

Contextual Info: N2CB2G40BN / N2CB2G80BN / N2CB2G16BP 2Gb DDR3 SDRAM B-Die Feature  1.5V ± 0.075V JEDEC Standard Power Supply  Write Leveling  8 Internal memory banks (BA0- BA2)  OCD Calibration  Differential clock input (CK, )  Dynamic ODT (Rtt_Nom & Rtt_WR)

Contextual Info: N2CB4G40BN / N2CB4G80BN / N2CB4G16BP N2CC4G40BN / N2CC4G80BN / N2CC4G16BP 4Gb DDR3 SDRAM B-Die Feature  VDD = VDDQ = 1.5V ± 0.075V JEDEC Standard  8n-bit prefetch architecture Power Supply  Output Driver Impedance Control VDD = VDDQ = 1.35V -0.0675V/+0.1V

nt5cb64m16

Abstract: NT5CB64M16AP-CF NT5CB64M16AP-AC NT5CB256M4AN NT5CB64M16AP srt 8n NT5CB64M16AP-CG nt5cb64m16ap-dh NT5CB128M8 NT5CB256M4AN-CG
Contextual Info: 1Gb DDR3 SDRAM A-Die NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP Feature  Write Leveling  1.5V ± 0.75V JEDEC Standard Power Supply  OCD Calibration  8 Internal memory banks (BA0- BA2)  Dynamic ODT (Rtt_Nom & Rtt_WR)  Differential clock input (CK, )

NT5CB256M8

Abstract: nt5cb128m16 NT5CB256 NT5CB256M8BN-CG NT5CB256M8BN-BE NT5CB256M4CN NT5CB512M4BN NT5CB128M
Contextual Info: 2Gb DDR3 SDRAM B-Die NT5CB512M4BN / NT5CB256M8BN / NT5CB128M16BP Feature  1.5V ± 0.075V JEDEC Standard Power Supply  Write Leveling  8 Internal memory banks (BA0- BA2)  OCD Calibration  Differential clock input (CK, )  Dynamic ODT (Rtt_Nom & Rtt_WR)

"2Gb DDR3 SDRAM"

Abstract: NT5CB256M8BN
Contextual Info: 2Gb DDR3 SDRAM B-Die NT5CB512M4BN / NT5CB256M8BN / NT5CB128M16BP NT5CC512M4BN / NT5CC256M8BN / NT5CC128M16BP Feature  1.5V ± 0.075V / 1.35V +0.0675V/-0.1V JEDEC Standard Power Supply  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)

NT5CB256M16BP

Abstract: NT5CB256M16BP-DI NT5CC256M16BP NT5CB256M16BP-CG NT5CB256M16 NT5CC256M16BP-DI NT5CC512M8BN-DI NT5CB512M8BN-DI NT5CC1024M4BN-CG NT5CB512M8BN-CG
Contextual Info: 4Gb DDR3 SDRAM B-Die NT5CB1024M4BN / NT5CB512M8BN / NT5CB256M16BP NT5CC1024M4BN / NT5CC512M8BN / NT5CC256M16BP Feature  VDD = VDDQ = 1.5V ± 0.075V JEDEC Standard  8n-bit prefetch architecture Power Supply  Output Driver Impedance Control VDD = VDDQ = 1.35V -0.0675V/+0.1V