180KOHMS Search Results

GPES230B2

Contextual Info: GPES230B2 Easy-to-use SOUNDPLUS JAN. 06, 2009 Version 1.1 GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. TECHNOLOGY INC. is believed to be accurate and reliable. Information provided by GENERALPLUS However, GENERALPLUS TECHNOLOGY INC. makes no warranty for any errors which may

PO88

Abstract: ttl buffer AOI222 AOI2223 AOI2223H AOI222H MH1099 MH1242 PRD21 PRD29V5
Contextual Info: Features • High Speed - 170 ps Gate Delay - 2 input NAND, FO=2 nominal • Up to 1.6 Million Used Gates and 596 pads, with 3.3V, 3V, and 2.5V libraries • System Level Integration Technology Cores on request: SRAM and TRAM (Gate Level or Embedded) • I/O Interfaces:

Contextual Info: S PES240B SP e asy-to-use SOUNDPLUS ea FEB. 12, 2003 Version 1.3 SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO. is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document.

TEMIC PLD

Abstract: PRU10 PRD8 buffer 8x Structure of D flip-flop DFFSR AOI222 AOI2223 AOI2223H AOI222H MH1099
Contextual Info: MH1 1.6 Million gates Sea of Gates / Embedded Arrays 1. Description The MH1 Series Gate Array and Embedded Array families from TEMIC are fabricated in a 0.35µ CMOS process, with up to 3 levels of metal. This family features arrays with up to 1.6 million routable gates and 600 pins. The

GPES240B2

Contextual Info: GPES240B2 Easy-to-use SOUNDPLUS JAN. 06, 2009 Version 1.1 GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. TECHNOLOGY INC. is believed to be accurate and reliable. Information provided by GENERALPLUS However, GENERALPLUS TECHNOLOGY INC. makes no warranty for any errors which may

Contextual Info: DATA SHEET S PES230B SP e asy-to-use SOUNDPLUS ea SEP. 01, 2003 Version 1.3 SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO. is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document.

Contextual Info: SPLB33A 832 Dots Data Bank Preliminary MAR. 09, 2005 Version 0.4 Sunplus Technology reserves the right to change this documentation without prior notice. Information provided by Sunplus Technology is believed to be accurate and reliable. However, Sunplus Technology makes no warranty for any errors which may appear in this document.

UPS schematics

Abstract: LQH32CN100K11L hc04 smd J1 HE10 LQH32CN100K21L 7521B inverter bill of material AT89STK SCR Inverter datasheet AT89STK-09
Contextual Info: AT89STK-09 Starter Kit for AT83C26 . User Guide Section 1 Introduction . 1-2

Transistor Equivalent list po55

Abstract: Structure of D flip-flop DFFSR tristate buffer sis 968 PO-44Z PRU11 AC/DC drive nec 78054 PO22 tristate buffer cmos
Contextual Info: Features • High Speed - 180 ps Gate Delay - 2 input NAND, FO=2 nominal • Up to 1.198 M Used Gates and 512 Pads with 3.3 V, 3V and 2.5V libraries when tested to space quality grades • Up to 1.6M Used Gates and 596 Pads with 3.3 V, 3V and 2.5V libraries when tested to

digital to resolver converter

Abstract: 392AI00 scott-t transformer 392A100 "digital to synchro" digital to synchro converter 115v 400Hz resolver vor antenna 392A101 26v 400Hz synchro to digital converter
Contextual Info: digital to synchro converter 5 va_16 bit series 392A100 FEATURES • ±2.0 minute accuracy • ±0.15% radius vector accuracy • "Locked rotor'1protection • Short ckt & thermal protection • Loss of power supply protection • Integral heatsinking