18BL Search Results

TV18-18BL

Contextual Info: T&B Catalog Number: UPC Number: Description: TV18-18BL Status: Active 78621069960 Insulated Vinyl Blade Terminal for Wire Range 22-16 , Red Features For use in DIN-Style Blade Terminal blocks. Molded Funnel Entry Insulator. Brazed Seam. Internal Barrel Serrations.

Pin terminals

Abstract: TV14-10BL TV18 TV10-10BL TV18-10BL TV-18
Contextual Info: T&B Crimp Terminals Blade Terminals, Pin Terminals Vinyl Insulated Straight Blade Terminals Dimensions Cat. No. TV18-10BL TV18-18BL TV14-10BL TV14-18BL TV10-10BL †For I.D. Dist. Bagged Qty. Bulk† Ctn. Qty. .173 .173 .177 .177 .266 50 50 50 50 25 1,000

alpha POTENTIOMETERS

Abstract: Taiwan Alpha RV141F
Contextual Info: CUSTOMER'S NAME ALPHA REFERENCE NO SPI2080108 MOUSER ELECTRONICS SPECIFICATION PART NO. ALPHA MODEL NAME R V 141F -4 0 E 3 -18BL-B X X K . BXXK FOR 5K-500K MODEL NAME APPROVAL MODEL NO. PREPARED BY REVIEWED BY APPROVED BY L M élJ : Ü ñF*20 n ALPHA «LIS I? t jtïg -1 2 2 1 ~ 1 2 2 3 ft9 fè

D2B4

Abstract: H1B13
Contextual Info: SN54ABT32543, SN74ABT32543 36-BIT REGISTERED BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS230B - JUNE 1992 - REVISED JULY 1994 • Members of the Texas Instruments Wldebus+ Family • State-of-the-Art EPIC-llB™ BICMOS Design Significantly Reduces Power Dissipation

Contextual Info: HIGH-SPEED 1 6 K X 9 DUAL-PORT STATIC RAM ID T 7 0 1 6 S /L Features using the Master/Slave select when cascading more than * True Dual-Ported memory cells which allow sim ultaneous one d e v i c e _ reads of the sam e memory location M/S = V ih for B U S Y output flag on Master

MP5507

Abstract: DAC370-18 MP370 MP9331-16 9331-16 pml 003 am
Contextual Info: CMOS M MICRO drxFG POWER SYSTEMS 16-Bit Storage Register, MDAC 18-Bit Storage Register, MDAC M P370/M P9331-16 FEATURES • • • • • • • • 16-Bit 0.0008% Linearity Dual Chip Construction Input Data Registers 28-pln/24-pin Double Wide DIP Low Power Consumption

MAX502AEWG

Abstract: 4mA-to-20mA logic diagram of ic 7475 MAX501 MAX501ACNG MAX501ACWG MAX501AENG MAX501BCNG MAX501BCWG MAX502
Contextual Info: 19-4011; R ev 1; 12/96 J W Æ X \ J V \ Voltage-Output, 1 2 -B it M u ltip lyin g DACs _ Features The MAX501/MAX502 are 12-bit, 4-quadrant, voltageoutput, multiplying digital-to-analog converters DACs with an output amplifier. Thin-film resistors, laser

MU9C9750

Abstract: 3M Philippines
Contextual Info: MU9C9750, 9750V, 9750A LOW-POWER SYNDAC S E M I C O N D U C T O R S D L IM N A R Y S Â T B O IN DISTINCTIVE CHARACTERISTICS Combination Look-up Table, Triple Video DAC, and Dual Clock Synthesizer o Directly drives transmission line o Precision internal reference MU9C9750A)

Contextual Info: SIGNAL PROCESSING SIGNAL PROCESSING TECHNOLOGIES SEE D • âS4ôT17 0QQ 1H2 1 T ■ -O S - DIGITAL SIGNAL PROCESSING DASP-HDSP66110 PAC-HDSP66210 Digital Array Signal Processor Programmable Array Processor TABLE OF CONTENTS PAGE NO. SECTION 1.0 INTRODUCTION

Contextual Info: • SIEM ENS Ô235b05 QaEDESb b HSIË fî SIEMENS A KT IE NGESELLSCHAF 1 M X 36-Bit Dynamic RAM Module 47E D HYM 361Q20S-8Q/-10 Advanced Information • • • • • • • • • • 1 04 576 x 36-bit organization alternative 2 097 153 x 18-bit Fast access and cycle time

74ACT16475

Abstract: 54ACT16475
Contextual Info: I TEXAS INSTR 3TE L O G I C 0^1723 QQ^aaB? □ « T u a » ~r~ , *2 i • \~D<*rZ> I ' 54AC16475, 54ACT16475 74AC16475, 74ACT16475 18-BIT REGISTERED BUS TRANSCEIVERS WITH 3-STATE OUTPUTS TO2S1— 03574, JUNE 1990 54AC16475, 54ACT16475 . . W D PACKAGE 74AC16475, 74A CT16475. . . OL PACKAGE

SAA7345

Abstract: tda 9344 CM 4200 JIS-C-6560 LTU 455 E 2 metal detector diagram PI QFP64 SAA7376 TDA1301 TDA1301T
Contextual Info: Philips Semiconductors Preliminary specifications Digital servo processor and Compact Disc decoder CD7 7.13 7.13.1 7.13.2 7.13.3 7.13.4 7.13.5 7.13.6 7.13.7 7.13.8 7.13.9 7.13.10 7.13.11 7.14 7.14.1 7.14.2 7.14.3 CONTENTS 1 FEA TU RES 2 GEN ERAL DESCRIPTION

Contextual Info: PARALLEL SyncBiFlFO CLOCKED BIDIRECTIONAL FIFO 256 x 18-BIT AND 5 1 2 x 1 8-BIT PRELIMINARY IDT72605 IDT72615 Integrated Device Technology. Inc. FEATURES: • Two independent FIFO m emories for fully bidirectional data transfers • 256 x 18 organization (IDT 72605)

Contextual Info: HIG H-SPEED 2K x 9 DUAL-PORT STATIC RAM W ITH BUSY & INTERRUPT ADVANCE INFORMATION IDT 70121 IDT 70125 FEATURES: DESCRIPTION: • High-speed access The IDT70121/IDT70125 are high-speed 2K x 9 dual port static RAMs. The IDT70121 is designed to be used as a stand-alone 9-bit

7408, 7404, 7486, 7432 use NAND gate

Abstract: JLCC-68 ci 74386 cI 74150 jLCC68 74153 full adder 7402, 7404, 7408, 7432, 7400 74106 sln 7404 LCC-64
Contextual Info: MB65XXXX MB66XXXX MB67XXXX AV CMOS SERIES GATE ARRAYS F U JIT S U June 1986 Edition 2.0 DESCRIPTION The Fujitsu MB65xxxx/M B66xxxx/M B67xxxx family are a series o f high perform ance CMOS gate arrays designed to provide high density, low pow er, and operating speeds th a t are com parable to standard bipolar logic. The A V M 865xxxx series is an ideal

at enhance v520

Contextual Info: !< & / Integrated Dev Ice Technology» Inc. BUS-MATCHING BIDIRECTIONAL FIFO 512 x 18-BIT - 1024 X 9-BIT 1024 x 18-BIT - 2048 x 9-BIT IDT7251 . '° 5 2 IDT72520 FEATURES: DESCRIPTION: • Two side-by-side FIFO memory arrays lor bidirectional data transfers

Contextual Info: PRELIMINARY DATA SHEET NEC |jPD461318/36LSl Bi-CMos S y n c h r o n o u s S t a t i c Ram MAR. 1995 Description The nPD461318/36LS1 is a 65,536-word by 18-blt / 32,768-word by 36-blt synchronous static RAM fabricated with advanced BI-CMOS technology using

MAX501/MAX502

Abstract: MAX502Bcng
Contextual Info: 19-4011; R ev 1; 12/96 J W Æ X \ J V \ Voltage-Output, 1 2 -B it M u ltip lyin g DACs _ Features The MAX501/MAX502 are 12-bit, 4-quadrant, voltageoutput, multiplying digital-to-analog converters DACs with an output amplifier. Thin-film resistors, laser

Contextual Info: MÌE ] • Säbfl MSb 0005033 S^ f i HnnHS lllinjlll Preliminary MATRA l ^ ¥ C s '3 Ö January 1991 M H S M 67201 HI-REL DATA SHEET 512 k X 9 CMOS PARALLEL FIFO FEATURES . EMPTY, FULL AND HALF FLAGS IN SINGLE DEVICE MODE . RETRANSMIT CAPABILITY ■ FIRST-IN FIRST-OUT DUAL PORT MEMORY

IS49NLC96400

Contextual Info: IS49NLC96400,IS49NLC18320,IS49NLC36160 576Mb x9, x18, x36 Common I/O RLDRAM 2 Memory ADVANCED INFORMATION JULY 2011 FEATURES •          533MHz DDR operation (1.067 Gb/s/pin data rate) 38.4Gb/s peak bandwidth (x36 at 533 MHz

M1017

Abstract: IS49NLS18160
Contextual Info: IS49NLS93200,IS49NLS18160 288Mb x9, x18 Separate I/O RLDRAM 2 Memory ADVANCED INFORMATION JULY 2012 FEATURES •         533MHz DDR operation (1.067 Gb/s/pin data rate) 38.4 Gb/s peak bandwidth (x18 Separate I/O at

TL32088

Contextual Info: TL32088 DIFFERENTIAL ANALOG BUFFER AMPLIFIER SLAS123-M AR CH 1995 Analog Front-End Integrated Circuit for the 18-Blt Stereo Audio Sigma-Delta Analog-toDlgltal Converter TLC320AD58C and Equivalent Analog-to-Digital Converters NS PACKAGE TOP VIEW REF L1 [ 1

1h39

Abstract: itt 2222 SN74ABT3614
Contextual Info: SN74ABT3614 64 x 36 x 2 CLOCKED FIRST-IN, FIRST-OUT MEMORY WITH BUS MATCHING AND BYTE SWAPPING SC B S1 2 6 C -JU N E 1992- R E V IS E D JANUARY 1994 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident TWo Independent 64 x 36 Clocked FIFOs Buffering Data In Opposite Directions

Contextual Info: Detailed Specifications & Technical Data ENGLISH MEASUREMENT VERSION 8446 Multi-Conductor - Audio, Control, Communication and Instrumentation Cable For more Information please call 1-800-Belden1 Description: 22 and 18 AWG stranded 7x30 and 16x30 tinned copper conductorsm conductors cabled, PVC