1C020 Search Results

WH17

Abstract: BC118 VP2122 bc102 "SERIES MELPS 740" BC117 transistor BC118 bbc cs5 BC78 "MELPS 740"
Contextual Info: To all our customers Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog

3CC7

Contextual Info: Parallel Interface, 625 kSPS, 24-Bit Σ∆ ADC AD7762 Preliminary Technical Data FEATURES FUNCTIONAL BLOCK DIAGRAM High performance 24-bit Sigma-Delta ADC 118dB SNR at 78kHz output data rate 106dB SNR at 625 kHz output data rate 625 kHz maximum fully filtered output word rate

Contextual Info: PAGE 1 OF 4 ATMEL CORPORATION Tel: 408 441-0311 Fax:(408)436-4200 AT-27BV1024 CMOS EPROM RELIABILITY DATA - 150°C RETENTION BAKE (PLASTIC) - 125°C DYNAMIC LIFETEST (PLASTIC) - EXTENDED TEMPERATURE CYCLE JULY 2003 2325 Orchard Parkway San Jose CA. 95131 PAGE 2 OF 4

BC118

Abstract: wl12 VP117 "SERIES MELPS 740" T56R VP1126 VP137 VP136 23C16 BC128
Contextual Info: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid

AD7760

Abstract: AD7762 AD7763 DB10 24-tap
Contextual Info: 2.5 MSPS, 24-Bit, 100 dB Σ∆ ADC With On-Chip Buffer AD7760 FEATURES 120 dB dynamic range at 78 kHz output data rate 100 dB dynamic range at 2.5 MHz output data rate 112 dB SNR at 78 kHz output data rate 100 dB SNR at 2.5 MHz output data rate 2.5 MHz maximum fully filtered output word rate

Contextual Info: Serial Interface, 625 kSPS, 24-Bit Σ∆ ADC AD7763 Preliminary Technical Data FEATURES FUNCTIONAL BLOCK DIAGRAM High performance 24-bit Sigma-Delta ADC 118dB SNR at 78kHz output data rate 106dB SNR at 625 kHz output data rate 625 kHz maximum fully filtered output word rate

Contextual Info: Preliminary Technical Data 24-Bit, 625kSPS, 109dB Σ∆ ADC With On Chip Buffers,Serial Interface AD7763 FEATURES FUNCTIONAL BLOCK DIAGRAM VIN- VIN+ Multi-Bit Sigma-Delta Modulator DIFF VREF+ REFGND + BUF - Reconstruction AD7763 MCLK MCLKGND SYNC RESET SH2:0

SCR FIR 3 D

Contextual Info: 24-Bit, 625 kSPS, 109 dB Sigma-Delta ADC with On-Chip Buffers, Serial Interface AD7763 FUNCTIONAL BLOCK DIAGRAM FEATURES VIN– VIN+ MULTIBIT Σ-Δ MODULATOR DIFF AVDD1 AVDD2 AVDD3 VREF+ RECONSTRUCTION BUF REFGND AVDD4 DECAPA DECAPB AD7763 PROGRAMMABLE DECIMATION

TMPR3903AF

Abstract: TC5118165 TOSHIBA Thyristor QFP208-P-2828-0 P10GD toshiba lcd nmp tvs 5v sy 6551 MIPS R3000A
Contextual Info: Preface Thank you for your new or continued patronage of Toshiba semiconductor products. This is the 1998 edition of the databook for the TMPR3903AF 32-bit TX System RISC microcontroller. This databook is written so as to be accessible to engineers who may be designing a Toshiba

TSOP 173 g

Abstract: 5H9602 6c9648 3b1326 5G9551 MIL-M-38535 6F9627 4c19 3C1660 atmel 906
Contextual Info: PAGE 1 OF 21 ATMEL COPORATION Tel: 408 441-0311 Fax:(408)436-4200 AT-27C040 CMOS EPROM RELIABILITY DATA* -125°C DYNAMIC OPERATING LIFE TEST -200°C RETENTION BAKE -PROGRAM AND ERASE -125°C OPERATING LIFE TEST (PLASTIC) -150°C RETENTION BAKE (PLASTIC) -15 PSIG PRESSURE POT

spi to i2s

Abstract: 4140c 32x oversampling filter
Contextual Info: Serial Interface, 625 kSPS, 24-Bit Σ∆ ADC AD7763 Preliminary Technical Data FEATURES FUNCTIONAL BLOCK DIAGRAM High performance 24-bit Sigma-Delta ADC 118dB SNR at 78kHz output data rate 106dB SNR at 625 kHz output data rate 625 kHz maximum fully filtered output word rate

AD7762

Abstract: ad7760 AD7763 DB10 62368 4049e 30259 4101F
Contextual Info: 625 kSPS, 24-Bit, 109 dB Σ−Δ ADC With On-Chip Buffer AD7762 FEATURES FUNCTIONAL BLOCK DIAGRAM VIN– VIN+ MULTIBIT Σ-Δ MODULATOR DIFF AVDD1 AVDD2 AVDD3 VREF+ RECONSTRUCTION BUF AVDD4 DECAPA/B RBIAS AD7762 PROGRAMMABLE DECIMATION AGND VDRIVE MCLK DVDD

Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM 120 dB dynamic range at 78 kHz output data rate 109 dB dynamic range at 625 kHz output data rate 112 dB SNR at 78 kHz output data rate 106 dB SNR at 625 kHz output data rate 625 kHz maximum fully filtered output word rate

I2S bus specification

Abstract: SCR FIR 3 D AD7763 AD7760 AD7762 AD8021 ADR431 ADR434 ADR225 spi to i2s
Contextual Info: 24-Bit, 625 kSPS, 109 dB Sigma-Delta ADC with On-Chip Buffers, Serial Interface AD7763 FEATURES FUNCTIONAL BLOCK DIAGRAM VIN– VIN+ MULTIBIT Σ-Δ MODULATOR DIFF AVDD1 AVDD2 AVDD3 VREF+ RECONSTRUCTION BUF REFGND AVDD4 DECAPA DECAPB AD7763 PROGRAMMABLE DECIMATION

jrm a55

Abstract: tip 0ff 0401 ANALOG irf 5630 ko 224 4K tantalum capacitors jrm a45 irf 7408 bt 4840 pinout diagram A9F7 29 INCH crt tv FBT pinout chassis 3111 253 3266 2e jrm A45
Contextual Info: PR E FA C E T he IBM P erson al C o m p u te r T ech n ical R eferen ce M anual is designed to pro v id e h ard w are design an d in terfa ce in fo rm atio n . T h is p u b licatio n also provides B asic In p u t O u tp u t S y stem B IO S in fo rm atio n as w ell as p ro g ram m ing su p p o rt m a tter.

I2S bus specification

Abstract: spi to i2s AD7760 AD7762 AD7763 AD8021 ADR431 ADR434 SCR c50
Contextual Info: 24-Bit, 625 kSPS, 109 dB Σ-Δ ADC with On-Chip Buffers, Serial Interface AD7763 FEATURES FUNCTIONAL BLOCK DIAGRAM VIN– VIN+ MULTIBIT Σ-Δ MODULATOR DIFF AVDD1 AVDD2 AVDD3 VREF+ RECONSTRUCTION BUF REFGND AVDD4 DECAPA DECAPB AD7763 PROGRAMMABLE DECIMATION

ca5214

Abstract: 48-PIN AD7760 AD8021 DB10 664-622
Contextual Info: 2.5 MSPS, 20-Bit Σ∆ ADC AD7760 Preliminary Technical Data FEATURES FUNCTIONAL BLOCK DIAGRAM VIN- VIN+ Multi-Bit Sigma-Delta Modulator DIFF VREF+ + BUF - Reconstruction AD7760 Programmable Decimation Control Logic, I/O and Registers MCLK SYNC AVDD1 AVDD2

Contextual Info: 2.5 MSPS, 24-Bit, 100 dB Sigma-Delta ADC with On-Chip Buffer AD7760 FEATURES FUNCTIONAL BLOCK DIAGRAM VIN– VIN+ MULTIBIT Σ-Δ MODULATOR DIFF VREF+ AVDD1 AVDD2 AVDD3 RECONSTRUCTION BUF AVDD4 DECAPA/B RBIAS AD7760 MCLK PROGRAMMABLE DECIMATION RESET CS VDRIVE

F954

Abstract: f933 231 dsp hen nv 74is138 f953 F889 f922 MC68HC811A2 1023FD TAG 8602
Contextual Info: MOTOROLA Order this document by ANE415/D SEMICONDUCTOR APPLICATION NOTE ANE415 M C68HC11 Implementation of IEEE-488 Interface for DSP56000 M onitor Prepared by: Richard Soja and Mark Maiolani, Motorola Semiconductors Ltd, East Kilbride, Scotland This application note describes the implementation of an

C52 SCR

Abstract: EVAL-AD7760EB jedec 12pin bottom AD7760 AD7762 AD7763 DB10 1004MHz MS-026-ACD-HD
Contextual Info: 2.5 MSPS, 24-Bit, 100 dB Σ∆ ADC With On-Chip Buffer AD7760 FEATURES FUNCTIONAL BLOCK DIAGRAM VIN– VIN+ MULTIBIT Σ-∆ MODULATOR DIFF AVDD1 AVDD2 AVDD3 VREF+ RECONSTRUCTION BUF AVDD4 DECAPA/B RBIAS AD7760 PROGRAMMABLE DECIMATION AGND VDRIVE MCLK DVDD

TAG 8602

Abstract: F923 F946 F933 MC68HC811A2 f935 F954 tk 1838 f953 f922
Contextual Info: MOTOROLA Order this document by ANE415/D SEMICONDUCTOR APPLICATION NOTE ANE415 M C68HC11 Implementation of IEEE-488 Interface for DSP56000 M onitor Prepared by: Richard Soja and Mark Maiolani, Motorola Semiconductors Ltd, East Kilbride, Scotland This application note describes the implementation of an

BC118

Abstract: bc117 IC data sheet transistor BC118 transistor bc47 bc108 pin details T56R transistor bc102 osd character osd font bc128 connections
Contextual Info: IN ARY MITSUBISHI MICROCOMPUTERS P M37274MA-XXXSP . e n. atio chang cific to spe ubject l a a fin re s not mits a li is is : Th mentic e ic Not e para m o S IM REL SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

664-622

Abstract: AD7760 AD7762 AD7763 DB10 6a73 D854 1C020 3CC7 FIR31
Contextual Info: 24࿋Ă2.5 MSPSĂ100 dB Σ-Δ႙ADCLjాዃೌా࣐؋ AD7760 ༬Ⴀ ࠀీ઀཮ 78 kHz๼‫؜‬ຕ਍໏୲้Lj‫ۯ‬ༀ‫ྺྷݔ‬120 dB VIN– VIN+ 2.5 MHz๼‫؜‬ຕ਍໏୲้Lj‫ۯ‬ༀ‫ྺྷݔ‬100 dB 78 kHz๼‫؜‬ຕ਍໏୲้Lj႑ሯԲ SNR ྺ112 dB

4140c

Abstract: 4049e 2832U 62368
Contextual Info: 2.5 MSPS, 24-Bit Σ∆ ADC AD7760 Preliminary Technical Data FEATURES FUNCTIONAL BLOCK DIAGRAM VIN- VIN+ Multi-Bit Sigma-Delta Modulator DIFF VREF+ + BUF - Reconstruction AD7760 Programmable Decimation Control Logic, I/O and Registers SYNC AVDD1 AVDD2 AVDD3