1Q74177 Search Results

ATMEL AT27c512

Contextual Info: ETE D AT H E L CO R P • 1Q74177 ODGlOGb 4 AT27C512 Features • Low Power CMOS Operation • • • • • • • • • 100 nA max. Standby 40 mA max. Active at 5 MHz Fast Read Access Time-120ns Wide Selection of JEDEC Standard Packages Including OTP

atv750-30dc

Abstract: ATV750L-30KM ATV750-35DC AT22V10 ATV750 ATV750-35YI ATV750-30YC atv750-30dm ATV750-35DM
Contextual Info: ETE D ATMEL CORP 1Q74177 O O G llB I 1 • B— T- Features • Third Generation Programmable Logic Structure High Density Replacement or Discrete Logic • High Speed • Plus a New Low Power Version • Increased Logic Flexibility 42 Inputs and 20 SUM terms

ATMEL AT27c512

Abstract: AT27C512 ATMEL AT27c512 PLCC at27c512-15di AT27C512-15J 27C512 T-25 27C512* PLCC AT27C512-20DM AT27C512-15
Contextual Info: ETE D AT H E L CO R P • 1Q74177 ODGlOGb 4 AT27C512 Features • Low Power CMOS Operation • • • • • • • • • 100 nA max. Standby 40 mA max. Active at 5 MHz Fast Read Access Time-120ns Wide Selection of JEDEC Standard Packages Including OTP

Contextual Info: AT28LV64 Features • • • • • • • • • 2.7 V to 3.6 V Supply Full Read and Write Operation Low Power Dissipation 8 mA Active Current 50 |jA CMOS Standby Current Read Access Time - 200 ns Byte Write - 3 ms Direct Microprocessor Control DATA Polling

Contextual Info: AT29C010 Features • Fast Read Access Time - 90 ns • Five-Volt-Only Reprogramming • Sector Program Operation Single Cycle Reprogram Erase and Program 1024 Sectors (128 bytes/sector) Internal Address and Data Latches for 1 28 Bytes • Fast Sector Program Cycle Time-10 ms

Contextual Info: ATF16LV8C Features • • 3.0V to 3.6V Operation Industry Standard Architecture Emulates Many 20-Pin P A Ls” Low Cost Easy-to-Use Software Tools High Speed 10 ns Maximum Pin-to-Pin Delay Ultra-Low Power 5 uA Max. Pin-Controlled Power Down Mode Option

Contextual Info: ATF16V8CZ Features • In d u s try S tandard A rc h itec tu re E m u la te s M any 20-P in PALs Lo w C ost E a s y-to -U s e S o ftw are T o ols H igh S peed E lectrically E rasable P ro g ra m m a b le Logic D evices 12 ns M axim u m P in -to -P in D elay

AT90S1300

Abstract: jumo tm
Contextual Info: AT90S1300 Features • • • • • » • . • • • • • • • • Utilizes the AVR Enhanced RISC Architecture AVfl™ - High Performance and Low Power RISC Architecture 83 Powerful Instructions - Most Single Clock Cycle Execution 1K bytes of In-System Reprogrammable Downloadable Flash

Contextual Info: ATF20V8BQ/BQL Features • • • Quarter Power Equivalent of ATF20V8B - 55 mA Maximum Low Power ATF20V8BQL -1 0 mA Maximum Standby Industry Standard Architecture Emulates Many 24-Pin PALs Low Cost Easy-to-Use Software Tools High Speed Electrically Erasable Programmable Logic Devices

Contextual Info: AT28HC64/L Features • • • • • » • • • • Fast Read Access Time - 55 ns Automatic Page Write Operation Internal Address and Data Latches for 32 Bytes Internal Control Timer Fast Write Cycle Times Maximum Page Write Cycle Time: 2 ms 1 to 32 Byte Page Write Operation

AT29LV512

Contextual Info: AT29LV512 Features • • • • • • • • • • • • Single 3.3 V ± 10% Supply Three-Volt-Only Read and Write Operation Software Protected Programming Low Power Dissipation 15 mA Active Current 20 |iA CMOS Standby Current Fast Read Access Time - 200 ns

AT27LV256R

Abstract: AT27LV256R-30 1N914 AT27C256R
Contextual Info: ATMEL CORP m 43E D 1D7417? 0 0 01 7 2 ^ D SB ATM AT27LV256R T-Y6-/3-2 9 T-H6 -G-25 Features • • • • • • • • • • • W ide P ow er S upply R ange, 3.0 V D C to 5.5 V D C C om patible w ith JE D E C S tandard A T27C 256R Low P ow er 3-V o lt C M O S O peration

amd c-50

Abstract: atmel h 208 TTL 74xx
Contextual Info: ATL Features • 1.0 n Drawn Gate Length High-performance CMOS Gate Arrays • All ATL Gate Arrays are Specified from 3.0 Volts to 5.5 Volts, for Standard and Low Voltage Applications • Design Translation of Existing ASIC Designs Provide for Easy Alternate Sourcing with Equivalent or Improved Performance

AT38H256

Abstract: 28P3 AT38H256-20NC 28-P3 1Q74 AT38H256-35XI
Contextual Info: AT38H256 Features • • • • • • • • • Fast Read Access Time - 20 ns Low Power 100 mA Maximum Active 0.1 mA Maximum (Standby) Fully Static: No Clock Required Two Control Inputs (CE and OE) TTL Compatible Inputs and Outputs 5 V ± 10% Supply

AT28PC64

Abstract: AT28PC 920A7 AT-28PC64 10-NP at28 5962-87514 28PC64
Contextual Info: AT28PC64 Features • • • • • • • • • • Fast Read Access Time -150 ns Automatic Page Write Operation Internal Address and Data Latches fo r 32 Bytes Internal Control Timer Fast Write Cycle Times Maximum Page Write Cycle Time: 2 ms 1 to 32 Byte Page Write Operation

Contextual Info: ATV2500H/L Features • Third Generation Programmable Logic Structure Easily Achieves Gate Utilization Factors of 80 Percent Increased Logic Flexibility 86 Inputs and 72 Sum Terms Flexible Output Macrocell 48 Flip-Flops • 2 per Macrocell 3 Sum Terms - Can Be OR’ed and Shared

Contextual Info: ETE D ATMEL CORP 1Q7417? QDGCHLib 1 I — AT27HC256/L t S Features • Bipolar Speed in JEDEC Standard EPROM Pinout Read Access Time - 55ns 20-Lead 600 mil CERDIP and OTP Plastic DIP 32-Pad LCC 32-Lead JLCC and OTP PLCC • Low Power CMOS Operation 100 /iA max. Standby

Contextual Info: AT29BV020 Features • • • • • • • • • • • • • Single Supply Voltage, Range 2.7V to 3.6V Single Supply lor Read and Write Software Protected Programming Fast Read Access Time - 250 ns Low Power Dissipation 15 mA Active Current 20 |iA CMOS Standby Current

Contextual Info: AT93C46/56/57/66 Features • Low Voltage and Standard Voltage Operation 5.0 V Vcc = 4.5 V to 5.5 V 3.0 V (Vcc = 2.7 V to 5.5 V) 2.5 V (Vcc = 2.5 V to 5.5 V) 2.0 V (Vcc = 1.8 V to 5.5 V) User Selectable Internal Organization 1K: 1 2 8 x 8 or 6 4 x 1 6 2K: 256 x 8 or 128x16

Contextual Info: AT29C01OA Features • • • • • • • • • • • • • Fast Read Access Time - 70 ns 5-Volt-Only Reprogramming Sector Program Operation Single Cycle Reprogram Erase and Program 1024 Sectors (128 bytes/sector) Internal Address and Data Latches for 128-Bytes

Contextual Info: AT29LV512 Features • • • • • • • • • • • • Single 3.3 V ± 10% Supply Three-Volt-Only Read and Write Operation Software Protected Programming Low Power Dissipation 15 mA Active Current 20 |iA CMOS Standby Current Fast Read Access Time - 200 ns

Contextual Info: ATV2500B Features • High Performance, High Density Programmable Logic Device Typical 7 ns Pin-to-Pin Delay Fully Connected Logic Array With 416 Product Terms Flexible Output Macrocell 48 Flip-Flops - Two per Macrocell 72 Sum Terms All Flip-Flops, I/O Pins Feed In Independently

Contextual Info: AT28C010 Mil Features • • • • • • • • • • Fast Read Access Time -12 0 ns Automatic Page Write Operation Internal Address and Data Latches for 128 Bytes Internal Control Timer Fast Write Cycle Time Page Write Cycle Time -1 0 ms maximum 1 to 128 Byte Page Write Operation

nansa ss 30

Abstract: jrm a55
Contextual Info: ATV2500B Features • • • • High Performance, High Density Programmable Logic Device Typical 7 ns Pin-to-Pin Delay Fully Connected Logic Array With 416 Product Terms Flexible Output Macrocell 48 Flip-Flops - Two per Macrocell 72 Sum Terms All Flip-Flops, I/O Pins Feed In Independently