22V10 MACROCELL Search Results

kontron mpp

Abstract: Kontron MPP80S AMPAL22V10-20 MPP80S 360A001 kontron* mpp-80s AMPAL22V10 CD3024 PD3024 MPP-80S
Contextual Info: A DV MICRO PLA/PLE/ARRAYS Tb ß F | 055752b □□57t.3ci AmPAL*22V10-15/22V10-20 3WiJ 24-Pin IMOX III™ Programmable Array Logic PAL PRELIMINARY DISTINCTIVE CHARACTERISTICS TTL-level PRELOAD for improved testability Packaged in 24-pin Slim DIP and 28-pin chip-carrier

AM 22V10

Abstract: 22V10 AMD 22V10 22V10-15 KLK Fuses PALC22V10 PEEL22CV eeprom programmer schematic design K/VHC86G
Contextual Info: Philips Semiconductors Military Programmable Logic Devices_ CMOS programmable electrically erasable 22V10-15 logic d e v i c e _ _ PIN CO NFIGU RATIO N D ESCRIPTIO N FEATURES • Advanced CMOS EEPROM technology

or213

Contextual Info: intei AQWANOS DKI F@1^[M^¥0 M ¡PLDLV22V10-5 LOW VOLTAGE, ELECTRICALLY ERASABLE 1Q-MACROCELL CMOS PLD Low Voltage, Low Current, High Speed Upgrade to BiCMOS/Bipolar 22V10 and CMOS Equivalents 10 Macroceils with Programmable I/O Architecture (Registered/

Contextual Info: AIEM&NKgll in te i ¡PLDLV22V10-5 LOW VOLTAGE, ELECTRICALLY ERASABLE 10-MACRQCELL CMOS PLD Low Voltage, Low Current, High Speed Upgrade to BiCMOS/Bipolar 22V10 and CMOS Equivalents 10 Macrocells with Programmable I/O Architecture Registered/ Combinatorial

Contextual Info: DENSE-PAC Programmable Logic DPL22V10A MICROSYSTEMS DESCRIPTION: The Dense-Pac Programmable Logic Module DPL is a 48-pin Pin Grid Array (PGA) designed to support two "22V10" field programmable array logic, 22 input, 10 macrocell output devices (DPL22V10A), including decoupling capacitors, at a

3.3v to 5v buffer latch

Abstract: preset resistor 3.3v to 5v interface components
Contextual Info: fax id: 6136 PRELIMINARY CY7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks

P85C22V10

Abstract: N85C22V10
Contextual Info: tffc P H U IL D IiS lD K lM V intei 85C22V10 FAST IO-MACROCELL CHMOS juPLD High-Speed Upgrade to Bipolar 22V10/22VP10 and CMOS Equivalents Global Asynchronous Clear and Synchronous Preset P-terms High-Performance, LSI Semi-Custom Logic Alternative to Low-End Gate

85C22V10

Abstract: n85c22v10 N85C22V10-10 P85C22V10 D85C22V10-15 P85C22V10-15 N85C22V10-15 P85C22V10-10 D85C22V10 22V10-Macrocell
Contextual Info: intei- 85C22V10 HIGH PERFORMANCE 10-MACROCELL CMOS PLD • High-Speed Upgrade to Bipolar 22V10/22VP10 and CMOS Equivalents Global Asynchronous Clear and Synchronous Preset P-terms ■ High Performance, LSI Semi-Custom Logic Alternative to Low-End Gate Arrays, TTL, 74HC SSI and MSI Logic,

P5Z22V10IDA

Abstract: P5Z22V10DA
Contextual Info: Philips Semiconductors Product specification 5V zero power, TotalCMOS , universal PLD device P5Z22V10 FEATURES e Programmable output polarity e Industry’s first TotalCMOS™ 22V10 - both CMOS design and process technologies e Synchronous preset/asynchronous reset capability

THX 201

Abstract: PA7540 pa7540p-15l GAL6002
Contextual Info: PA7540 PEEL Array Programmable Electrically Erasable Logic Array CMOS Electrically Erasable Technology - Reprogrammable in 24-pin DIP, SOIC and 28-pin PLCC packages - Optional JN package for 22V10 power/ground compatibility Flexible Logic Cell - 2 output functions per logic cell

Contextual Info: in te i MILITARY ÍPLD22V10 FAST 10-MACROCELL CMOS PLD High-Speed Upgrade to Bipolar 22V10 and CMOS Equivalents 1-Micron CHMOS HIE EPROM Technology, UV-Erasable programmable “Security Bit” Allows Total Protection of Proprietary Designs 100% Generically Tested Logic Array

Contextual Info: Product spécification Philip* Semiconductors 3V zero power, TotalCMOS , universal PLD device P3Z22V10 FEATURES • Programmable output polarity • Industry’s first TotalCMOS™ 22V10 - both CMOS design and process technologies • Synchronous preset/asynchronous reset capability

Contextual Info: 71i CY7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks 32 I/O pins

CY7C371

Abstract: CY7C372 FLASH370
Contextual Info: For new designs see CY7C372i CY7C372 UltraLogic 64-Macrocell Flash CPLD Features • • • • • • of use and high performance of the 22V10 to high-density CPLDs. 64 macrocells in four logic blocks 32 I/O pins 6 dedicated inputs including 2 clock pins

Contextual Info: CY7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks 32 I/O pins

iPLD22V10

Abstract: pld22v10 intel iPLD22V10
Contextual Info: in tj ¡PLD22V10-7 HIGH PERFORMANCE 10-MACROCELL CMOS PLD High-Speed Upgrade to Bipolar 22V10 and CMOS Equivalents • tpo 7.5 ns, 111.1 MHz with Feedback, 111.1 MHz with No Feedback ■ ■ Typical Icc = 90 mA @ 15 MHz ■ Programmable “Security Bit” Allows

iPLD22V10

Abstract: PLD-10 10-MACROCELL 29050 PLD22V10 ns142
Contextual Info: intei O K K F K G !fflÄ T D @ IM ¡PLD22V10L-5 LOW POWER, ELECTRICALLY ERASABLE 10-MACROCELL CMOS PLD Low Power, High Speed Upgrade to BiCMOS/Bipolar 22V10 and CMOS Equivalents 10 Macrocells with Programmable I/O Architecture Registered/ Combinatorial

Contextual Info: fax id: 6136 1CY 7C37 1i PRELIMINARY CY7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks

intel iPLDLV22V10

Abstract: 29049
Contextual Info: in te l AIOWAMKSB 0[M F (S1M A ¥0®M ÎPLDLV22V10-5 LOW VOLTAGE, ELECTRICALLY ERASABLE 10-MACRQCELL CMOS PLD Low Voltage, Low Current, High Speed Upgrade to BiCMOS/Bipolar 22V10 and CMOS Equivalents 10 Macrocells with Programmable I/O Architecture (Registered/

7C371-110

Abstract: 7C371-143 7C371-83 CY7C371 CY7C372 FLASH370
Contextual Info: For new designs see CY7C371i CY7C371 UltraLogic 32-Macrocell Flash CPLD Features • • • • • • of use and high performance of the 22V10 to high-density CPLDs. 32 macrocells in two logic blocks 32 I/O pins 6 dedicated inputs including 2 clock pins

intel PLD

Contextual Info: in lj. ¡PLDLV22V10-15 LOW VOLTAGE, HIGH PERFORMANCE 10-MACROCELL CMOS PLD Low Voltage High-Speed Upgrade to Bipolar 22V10 and CMOS Equivalente • Supply Voltage Range 3.0V to 3.6V ■ tpo 15 ns, 50 MHz with Feedback, 83.3 MHz with No Feedback ■ Max Ice = 35 mA

Contextual Info: CY7C372i UltraLogic 64-Macrocell Flash CPLD Features FLASH370i™ family of high-density, high-speed CPLDs. Like all members of the FLASH370i family, the CY7C372i is designed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to

85C22V10

Abstract: 85c22v10-15 P85C22V10-10 22VP10 85C22V10-10 D85C22V10 P85C22V
Contextual Info: 85C22V10 HIGH PERFORMANCE 10-MACROCELL CMOS PLD • High-Speed Upgrade to Bipolar 22V10/22VP10 and CMOS Equivalents ■ Global Asynchronous Clear and Synchronous Preset P-terms ■ High Performance, LSI Semi-Custom Logic Alternative to Low-End Gate Arrays, TTL, 74HC SSI and MSI Logic,

CY7C372

Abstract: CY7C371 FLASH370
Contextual Info: CY7C372 UltraLogic 64-Macrocell Flash CPLD FLASH370 family, the CY7C372 is designed to bring the ease of use and high performance of the 22V10 to high-density CPLDs. 1CY7C372 Features • • • • • • 64 macrocells in four logic blocks 32 I/O pins