236S2 Search Results

Contextual Info: w ~ CYPRESS Features • 32 macrocells in two logic blocks • 32 I/O pins • 6 dedicated inputs including 2 clock pins • In-System Reprogrammable ISR Flash technology — JTAG interface • No hidden delays • High speed — f M A X = 143 MHz — tpD= 8*5 ns

Contextual Info: s u o r i . lu e a u c iy , ivm y ¿ o , i Revision: Thursday, Juno 16,1994 W CYPRESS 32-Macrocell Flash CPLD Features Functional Description • 32 macrocells in two logic blocks • 32 I/O pins • 6 dedicated inputs including 2 clock pins • No hidden delays

L0523

Abstract: 236s2 319H
Contextual Info: CY7C373Ì UltraLogic 64-Macrocell Flash CPLD ADVANCED INFORMATION Features FuvsH370i'M family of high-density, high­ speed CPLDs. Like all m em bers of the • 64 m acrocells in four logic blocks FLASn370i family, the CY7C373i is de­ • 64 I/O pins signed to bring the ease of use and high

Band-pass

Abstract: LMF120 AN-779 LMF1 six order band pass Sallen-Key 236s2 LMF90 equivalent Z2SB 5321s C1995
Contextual Info: 1 0 INTRODUCTION Filters of some sort are essential to the operation of most electronic circuits It is therefore in the interest of anyone involved in electronic circuit design to have the ability to develop filter circuits capable of meeting a given set of

319S2

Abstract: 372i
Contextual Info: CY7C372Ì AD VAN C ED IN FO RM ATIO N Jf CYPRESS UltraLogic 64-Macrocell Flash CPLD F l a s h 3 7 0 i ™ fam ily o f h ig h -d e n sity , h ig h ­ F ea tu res • 64 m acrocells in fou r logic blocks • 32 I/O pins • 6 d ed icated in p u ts in clu d in g 2 clock

236s2

Contextual Info: PALCE22V10 F CYPRESS Features 3 ns t$ 5 ns tpD 181-MHz state machine • Low power — 90 mA max. commercial 10 11s Functional Description — 10 ns m ilitai? and industrial ver­ sions 7 n stc o 6 n s ts 10 n s tpD 110-MHz state m achine — 130 mA max. commercial (5 ns)

Contextual Info: CYPRESS AD VAN CED INFORMATION CY7C375Ì UltraLogic 128-Macrocell Flash CPLD Features • 128 m acrocells in eigh t logic b lock s • 128 I/O pins • 6 d ed icated in p u ts in clu d in g 4 clock p in s • In-S ystem R ep rogram m ab le IS R '“

Contextual Info: CY7C374 W f CYPRESS UltraLogic 128-Macrocell Flash CPLD Features • 128 macrocells in eight logic blocks • 64 I/O pins • 6 dedicated inputs including 4 clock pins • No hidden delays • High speed f M A X = 100 MHz — tpi = 12 ns — ts = 7 ns

cypress flash 370

Contextual Info: '#C YPR ESS ADVANCED INFORMATION CY7C371Ì UltraLogic 32-Macrocell Flash CPLD Features • 32 macrocells in two logic blocks • 32 I/O pins • 6 dedicated inputs including 2 clock pins • In-System Reprogrammable 1SR " Flash technology — JT A (i interface

Contextual Info: PRELIMINARY CYPRESS UltraLogic 32-Macrocell Flash CPLD Device CPLD and is part of the FLASH370i “ family of high-density, high­ speed CPLDs. Like all members of the FLASH370i family, the CY7C371i is de­ signed to bring the ease of use and high performance of the 22V10, as well as PCI

319s2

Contextual Info: ¿? CYPRESS CY7C373 UltraLogic 64-Macrocell Flash CPLD Features Functional D escription • 6 4 m acrocells in fou r logic blocks • 6 4 I/O pins • 6 d ed icated in p u ts in clu d in g 4 clock p in s • N o h id d en delays T h e C Y 7 C 3 7 3 is a F lash e ra s a b le C o m p lex