256X3 Search Results

Contextual Info: CMOS SyncBiFlFO 256x36x2, 512x36x2, 1,024x36x2 IDT723622 IDT723632 IDT723642 Hhtegiated Devize Technology, lie . NOTE: There is an errata notice on the last page and the corrections have been incorporated into this document. FEATURES: • Free-running C LK A and CLKB may be asynchronous or

Contextual Info: Integrated Device Technology, Inc. CMOS Sync BiFlFO With Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 PRELIMINARY IDT723624 IDT723634 IDT723644 NOTE: There is an errata notice on the last page and the corrections have not been incorporated into this document.

256X32

Abstract: Mercator vfd -driver iee vfd GMW25632CA NR30 clb-1 clb25 failure report VFD Drive
Contextual Info: g g zq sy J MERCATOR VFD MODULES GMW25632CA GMW25632CA Static Active Matrix VFD Module • • • • • • 256x32 Fine Dot Matrix 135mm x 27mm PCB Dimension Low Operating Voltage 15VDC Ultra High Brightness Display Low RFI Static Drive Operating Temperature -40 to +85°C

Contextual Info: CMOS SyncBiFlFO 256x36x2, 512x36x2, 1024x36x2 IDT723622 IDT723632 IDT723642 Integrated D evice Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident simultaneous reading and writing of data on a single clock edge is permitted

SRAM timing

Abstract: 256X32 99Q3P0 TAH 190 d010000
Contextual Info: d010000 256X32, Mux 4, Drive 3, Non-Pipelined High-Speed Single-Port Synchronous SRAM Features Memory Description • Precise Optimization for Infineon’s C9DD1 0.20µm The 256X32 SRAM is a high-performance, synchronous single-port, 256-word by 32-bit memory designed to

Contextual Info: In tegrated D e vice T e ch n o lo g y , Inc. CMOS Triple Bus SyncFIFOT With Bus-Matching 256x36x2, 512x36x2, 1024x36x2 PRELIMINARY IDT723626 IDT723636 IDT723646 NOTE: The errata notice on the last page describes corrections that have already been added to this document.

Contextual Info: Integrated D eviœ Technology, lie . CMOS SyncBiFIFO with Bus-Matching 256x36x2, 512x36x2, 1,024x36x2 FEATURES: • Memory storage capacity: IDT723624—256 x 36 x 2 IDT723634-512 x 36 x 2 IDT723644-1,0 2 4 x 3 6 x 2 • Two independent clocked FIFOs buffering data in

Contextual Info: 1dt Integrated Device Technology, Inc. 3.3 VOLT CMOS SyncBiFlFO WITH BUS-MATCHING 256x36x2, 512x36x2, 1,024 x 36 x 2 PRELIMINARY IDT72V3624 IDT72V3634 IDT72V3644 • Master Reset clears data and configures FIFO, Partial Reset clears data but retains configuration settings

Contextual Info: IDT723622 IDT723632 IDT723642 CMOS SyncBiFIFO 256x36x2, 512x36x2, 1024x36x2 Integrated Device Technology, Inc. Advance inform ation for the IDT723622 Final for the IDT723632 Advance inform ation f o r the IDT723642 • • • • • • • Program mable Alm ost-Full and Alm ost-Em pty flags

Contextual Info: 3.3 VOLT CMOS SyncBiFlFO 256x36x2, 512x36x2, 1 ,02 4 x3 6 x 2 I dt PRELIMINARY IDT72V3622 IDT72V3632 IDT72V3642 Integrated Device Technology, Inc. FEATURES: • Memory storage capacity: IDT72V3622-256 x 36 x 2 1DT72V3632-512 x 36 x 2 IDT72V3642-1,024 x 36 X 2

B17C

Contextual Info: _ INTEGRATED DEVICE. IDT •b6E D 4025771 DGlBlb'i 4flT ADVANCED INFORMATION CMOS SyncBiFlFO IDT723622 256x36x2,1024x36x2 IDT723642 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident • Two independent clocked FIFOs buffering data in oppo­

bd-9b

Contextual Info: MOSEL- VITELIC MS76542 256x36x2 BIDIRECTIONAL FIFO Features Description • ■ ■ ■ ■ The MS76542 contains two FIFO buffers which operate in parallel but opposite directions for bidirectional data buffering. The two FIFO buffers are each organized as 256 words by 36 bits. The

Contextual Info: VFD Module GU-800 series 256X32-800A 256x32 dot VFD module. Non built-in font type. Specifications Parameter Power Supply Voltage Symbol VCC Min. 4.75 Typ. 5.00 Max. 5.25 Unit VDC Condition - Parameter Logic Input Voltage H L Logic Output Voltage H L Reset Input Voltage

8251a usart interface from z80

Abstract: UDL TM 500 f922 verilog code for 8254 timer l912 256x32 POWER MODULE TM 31 udl 500 78K3 F5S4
Contextual Info: L4E75BS DÜHBÖGb 3ÔÔ B I N E C E CB-C7, 5-VOLT 0.8-M ICRON CELL-BASED CMOS ASIC NEC NEC Electronics Inc. August 1993 Description Figure 1. Integrated HDD Solution with CBC7 Cell-Based ASIC with Embedded 78K3 MPU, Compiled SRAMs and A/D Converters CB-C7 cell-based product family is a 0.8-micron drawn

Contextual Info: TECHNICAL NOTE D/A Converter Series for Electronic Adjustments ESD Resistance Standard 8bit 2ch・3ch Type D/A Converters Now available BH2219FVM, BH2220FVM ●Description The BH2219FVM and BH2220FVM are 8bit R-2R-type D/A converters with 2 and 3 channels, respectively. A compact

K8D3216UBC-pi07

Abstract: K5E5658HCM KAD070J00M KBH10PD00M K5D1257ACM-D090000 samsung ddr2 ram MTBF KBB05A500A K801716UBC k5d1g13acm k5a3281ctm
Contextual Info: Product Selection Guide Memory and Storage April 2005 MEMORY AND STORAGE SECTION A DRAM DDR2 SDRAM DDR SDRAM SDRAM RDRAM NETWORK DRAM MOBILE SDRAM GRAPHICS DDR SDRAM DRAM ORDERING INFORMATION FLASH NAND, OneNAND, NOR FLASH NAND FLASH ORDERING INFORMATION SRAM

736-Pin

Abstract: LSI coreware library 64X144
Contextual Info: ADVANCE DATASHEET RC1800 Foundation Slice Family July 2005 The RapidChip RC1800 Foundation Platform ASIC Family, except for the RC1812 slice, is in NO-NEW-DESIGN Status as of July 2005. LSI Logic is not accepting new designs in this slice Family. Information in this datasheet is

STM CL-80

Abstract: acp ca14 AD10 AD14 TXC-05551
Contextual Info: SARA-2 ATM Cell Processing 1C Device TXC-05551 DATA SHEET PRODUCT PREVIEW DESCRIPTION Test Access Port SARA-2 is a single-chip solution using feature/ application-specific microcode that performs complete segmentation and reassembly SAR for implementing

MachXO sysIO Usage Guide

Abstract: LCMXO256C-4M100C LCMXO2280 lcmxo640c-3tn100i LCMXO640C-3FT256C LCMXO1200 LCMXO256 LCMXO2280E-4M132I LVCMOS15 LVCMOS25
Contextual Info: MachXO Family Data Sheet Version 02.3_4W February 2007 MachXO Family Data Sheet Introduction April 2006 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL

LPC24XX

Abstract: timer video tms 9937 LPC2478FBD208 mst 702 lf LPC2468 pcb LPC2478 ARM7TDMI motor driver ic 7324 LPC247x LPC2478 pcb LPC2468FBD208
Contextual Info: UM10237 LPC24XX User manual Rev. 04 — 26 August 2009 User manual Document information Info Content Keywords LPC2400, LPC2458, LPC2420, LPC2460, LPC2468, LPC2470, LPC2478, ARM, ARM7, 32-bit, Single-chip, External memory interface, USB 2.0, Device, Host, OTG, Ethernet, CAN, I2S, I2C, SPI, UART, PWM, IRC,

DSC5002

Contextual Info: 256K x 36, 512K x 18 2.5V Synchronous ZBTTM SRAMs 2.5V I/O, Burst Counter Pipelined Outputs Features u 256K x 36, 512K x 18 memory configurations u Supports high performance system speed - 200 MHz Address and control signals are applied to the SRAM during one

723653

Abstract: 72V7290 72V3613 72V7250 72V3611 72V3623 72V72100 72V7230 72V7240 72V7260
Contextual Info: Selector Guide for FIFO Memory Products • Synchronous FIFOs SuperSync II, SuperSync™ SyncFIFO™, DualSync™ • Bi-Directional Synchronous FIFOs • Asynchronous FIFOs the leading provider of FIFO memories. July’00 IDT FIFO Memory Products Quick Reference Guide

16P2E

Abstract: M62354P 14P2N-A M62354
Contextual Info: To all our customers Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog

ORT8850

Abstract: ORT8850H ORT8850L STM-64 STS-192
Contextual Info: Preliminary Product Brief May 2000 ORCA ORT8850 Field-Programmable System Chip Introduction Field-programmable system chips FPSCs bring a whole new dimension to programmable logic: FPGA logic and an embedded system solution on a single device. Lucent Technologies Microelectronics Group