25NS Search Results

X84129

Abstract: AN107 AN103 AN95 X84129Z X84129ZI X841295 402 WP
Contextual Info: APPLICATION NOTE A V A I L A B L E AN95 • AN103 • AN107 MPS EEPROM X84129 128K µPort Saver EEPROM FEATURES DESCRIPTION • Up to 10MHz data transfer rate at 5V operator • 25ns Read Access Time • Direct interface to microprocessors and microcontrollers

STK1OC68-35

Contextual Info: STK10C68 CMOS nvSRAM High Performance 8K x 8 Nonvolatile Static RAM SlfTlTEH FEATURES DESCRIPTION 25, 30, 35 and 45ns Access Times 12,15, 20 and 25ns Output Enable Access Unlimited Read and Write to SRAM Hardware STORE Initiation Automatic STOflETimlng 104 or -tos STORE cycles to EEPROM

UN45

Contextual Info: STK11C68-M SlfTlTEH CMOS nvSRAM High Performance 8K x 8 Nonvolatile Static RAM MlL-STD-883/SMD # 5962-92324 FEATURES 30,35,45 and 55ns Access Times 15,20 and 25ns Output Enable Access Unlimited Read and Write to SRAM Software STORE Initiation Automatic STORE Timing

5962-8868101LA

Abstract: SMD a7 Transistor MT5C2564 5962-8868106LA 5962-8868103LA
Contextual Info: SRAM MT5C2564 Austin Semiconductor, Inc. 64K x 4 SRAM SRAM MEMORY ARRAY PIN ASSIGNMENT Top View • SMD 5962-88681 • MIL-STD-883 24-Pin DIP (C) (300 MIL) FEATURES 3 2 1 28 27 • • • • OPTIONS MARKING • Timing 15ns access 20ns access 25ns access

Contextual Info: STI721005D1 -xxVG 168-PIN DIMMS 1M X 72 Bit DRAM DIMM with FPM and ECC Optimized FEATURES • GENERAL DESCRIPTION Performance range: *RAC ^CAC *RC *PC STI.-60VG 60ns 20ns 110ns 40ns STI.-70VG 70ns 25ns 130ns 45ns The Simple Technology STI721005D1-xxVG is a 1M x 72 bit

MX23L3216XI-80

Abstract: MX23L3216 MX23L3216TI-10 MX23L3216TI-12 MX23L3216TI-80 MX23L3216XI-10 MX23L3216XI-12
Contextual Info: PRELIMINARY MX23L3216 32M-BIT MASK ROM FEATURES PIN DESCRIPTION • Bit organization - 4Mb x 8 byte mode - 2Mb x 16 (word mode) • Fast access time - Random access:80/25ns(max.) • Page Size - 8 words per page • Current - Operating:40mA - Standby:15uA(max.)

transistor C 5386

Contextual Info: leluom Semiconductor, Inc. TC4467 TC4468 TC4469 LOGIC-INPUT CMOS QUAD DRIVERS FEATURES • ■ ■ ■ ■ ■ ■ High Peak Output C urrent. 1.2A Wide Operating Range. 4.5 to 18V Symmetrical Rise and Fall Times.25nsec

stk 410 22 pin

Abstract: stk10c68-45 STK10C66
Contextual Info: STK10C68 SIÎTITEH CMOS nvSRAM High Performance 8K x 8 Nonvolatile Static RAM FEATURES 2 5,3 0,35 and 45ns Access Times 12,15, 20 and 25ns Output Enable Access Unlimited Read and Write to SRAM Hardware STORE Initiation Automatic STOflE Timing 100,000 STORE cycles to EEPROM

Contextual Info: STI641004D1-60G 168-PIN DIMMS 1M X 64 Bit DRAM DIMM with Extended Data Out EDO FEATURES • GENERAL DESCRIPTION Performance range: ^RAC ^CAC *RC *HPC 60ns 17ns 110ns 25ns • • EDO (Hyper) Mode operation CAS-before-RAS refresh capability • RAS-only refresh capability

382e

Contextual Info: STK10C68-M SimTEH CMOS nvSRAM High Performance 8K x 8 Nonvolatile Static RAM MIL-STD-833/SMD 5962 - 93056 FEATURES 30,35, 45 and 55ns Access Times 15,20 and 25ns Output Enable Access Unlimited Read and Write to SRAM Hardware STORE Initiation Automatic STORE Timing

Contextual Info: STI644004UD1-60VG 168-PIN DIMMS 4M X 64 Bit DRAM DIM M with EDO and without Buffers FEATURES • GENERAL DESCRIPTION Performance range: ^RAC I ^CAC 60ns 15ns I rC ^HPC 104ns 25ns The Simple Technology STI644004UD1-60VG is a 4M x 64 bit Dynamic RAM high density memory module. The Simple

Contextual Info: STI648004G1 -60VG 144-PIN SO-DIMMS 8M X 64 Bits DRAM SO-DIMM Memory Module FEATURES • GENERAL DESCRIPTION Performance range: *RAC ^CAC ^RC ^HPC 60ns 15ns 104ns 25ns The Simple Technology STI648004G1-60VG is a 8M x 64 bits Dynamic RAM high density memory module. The Simple

Contextual Info: STK12C88 SimTEK 32K x 8 AutoStore nvSRAM High Performance CMOS Nonvolatile Static RAM PRELIMINARY FEATURES DESCRIPTION • 25ns, 35ns and 45ns Access Times • Store to EEPROM initiated by Hardware, Soft­ ware or AutoStore™ on Power Down • Recall to SRAM Initiated by Hardware Reset,

Contextual Info: STK10C68 CMOS nvSRAM High Performance 8K x 8 Nonvolatile Static RAM SlfTlTEH FEA TU R ES DESCRIPTION 25,30, 35 and 45ns A ccess Times 12,15, 20 and 25ns Output Enable A ccess Unlimited Read and Write to SRAM Hardware STORE Initiation Automatic STO flETim ing

Contextual Info: UG5JT, UGF5JT, UGB5JT Series Vishay Semiconductors New Product formerly General Semiconductor Ultrafast Rectifiers Reverse Voltage 500 to 600V Forward Current 5.0A Reverse Recovery Time 25ns ITO-220AC UGF5 Series 0.188 (4.77) 0.172 (4.36) 0.405 (10.27) 0.383 (9.72)

Contextual Info: UC1708 UC2708 UC3708 www.ti.com SLUS171C – MARCH 1997 – REVISED SEPTEMBER 2007 DUAL NON-INVERTING POWER DRIVER • • • • • • FEATURES 1 • • • • • 3.0A Peak Current Totem Pole Output 5 to 35V Operation 25ns Rise and Fall Times 25ns Propagation Delays

4011 CMOS NAND GATE

Abstract: 4011 cmos logic gate cmos 4000 series 4023 MOS 4011 NAND gate 4011 4011 CMOS 4011 N4011 4011 c-mos
Contextual Info: signotics C MOS NAND GATES ADVANCE SPECIFICATIONS C-MOS 4000 S E R IES A D VA NC ED 01935429 _ PIN CONFIGURATIONS DESCRIPTION These Signetics Series 40 00 C-MOS devices are positive logic N A N D gates. Operating voltage range is + 3 V to +15V. S w itching speeds are ty p ic a lly 25ns. Quiescent power

CI 4001

Abstract: cmos ic 4001 cmos 4000 series cmos 4001 4001 CMOS NOR GATE 4001 nor gate pin configuration 4001 S4025 cmos logic 4001 series 4000 3 input nor
Contextual Info: signotics 4000 4001 4002 4025 C-MOS NOR GATES C-MOS 4000 SERIES AD VA N C ED INFORM ATION PIN CO N FIG U R A TIO N S DESCRIPTION These Signetics Series 4 0 0 0 C M O S devices are positive logic N O R gates. O perating voltage range is + 3V to +15V. S w itching speeds are ty p ic a lly 25ns. Quiescent pow er dissi­

Contextual Info: UC1711 UC3711 Dual Ultra High-Speed FET Driver FEATURES BLOCK DIAGRAM • 25ns Rise and Fall into 1000pF • 15ns Propagation Delay 7.5V REG • 1.5A Source or Sink Output Drive 6 VCC 7 A Out 5 B Out 3 Gnd 3k • Operation with 5V to 35V Supply 2.5k • High-Speed Schottky NPN Process

Contextual Info: Standard Products QCOTSTM UT8Q512K32 16Megabit SRAM MCM Data Sheet January 21, 2002 FEATURES q 25ns maximum 3.3 volt supply address access time q MCM contains four (4) 512K x 8 industry-standard asynchronous SRAMs; the control architecture allows operation as 8, 16, 24, or 32-bit data width

Contextual Info: Standard Products QCOTSTM UT8Q512 512K x 8 SRAM Data Sheet August, 2002 FEATURES q 25ns 3.3 volt supply maximum address access time q Asynchronous operation for compatibility with industrystandard 512K x 8 SRAMs q TTL compatible inputs and output levels, three-state

Contextual Info: Standard Products QCOTSTM UT8Q512K32 16Megabit SRAM MCM Advanced Data Sheet December 17, 2001 FEATURES q 25ns maximum 3.3 volt supply address access time q MCM contains four (4) 512K x 8 industry-standard asynchronous SRAMs; the control architecture allows

Contextual Info: Standard Products QCOTSTM UT9Q512K32 16Megabit SRAM MCM Data Sheet January 21, 2002 FEATURES q 25ns maximum 5 volt supply address access time q Asynchronous operation for compatible with industry standard 512K x 8 SRAMs q TTL compatible inputs and output levels , three-state

Contextual Info: Standard Products QCOTSTM UT9Q512 512K x 8 SRAM Data Sheet August, 2002 FEATURES q 25ns maximum 5 volt supply address access time q Asynchronous operation for compatibility with industrystandard 512K x 8 SRAMs q TTL compatible inputs and output levels, three-state