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    266 XNOR GATE Search Results

    266 XNOR GATE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TLP5702H Toshiba Electronic Devices & Storage Corporation Photocoupler (Gate Driver Coupler), High-Topr / IGBT driver, 5000 Vrms, SO6L Visit Toshiba Electronic Devices & Storage Corporation
    TLP5705H Toshiba Electronic Devices & Storage Corporation Photocoupler (Gate Driver Coupler), High-Topr / IGBT driver, 5000 Vrms, SO6L Visit Toshiba Electronic Devices & Storage Corporation
    TB67H481FTG Toshiba Electronic Devices & Storage Corporation Stepping and Brushed Motor Driver /Bipolar Type / Vout(V)=50 / Iout(A)=3.0 / IN input type / VQFN32 Visit Toshiba Electronic Devices & Storage Corporation
    GT30J110SRA Toshiba Electronic Devices & Storage Corporation IGBT, 1100 V, 60 A, Built-in Diodes, TO-3P(N) Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation

    266 XNOR GATE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    sn74hc48

    Abstract: SN74HC266N
    Text: SN54HC266, SN74HC266 QUADRUPLE 2ĆINPUT EXCLUSIVEĆNOR GATES WITH OPENĆDRAIN OUTPUTS SCLS135F − DECEMBER 1982 − REVISED AUGUST 2003 D Wide Operating Voltage Range of 2 V to 6 V D High-Current Inverting Outputs Drive Up To 10 LSTTL Loads D Low Power Consumption, 20-µA Max ICC


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    PDF SN54HC266, SN74HC266 SCLS135F SN54HC266 SN74HC266 scyd013 sdyu001x sgyc003d SN74HC4851/HC4852 sn74hc48 SN74HC266N

    led clock circuit diagram

    Abstract: ECL IC NAND ic 3842 datasheet DAC ic 0808 pin diagram 3842 smps IC 8 pin ic 3842 MCK12140 application note ADC 10 Ghz 266 XnOR GATE NB3N551
    Text: Complete Clock Management Solutions Processor Skew Tuning 1 HCSL TTL-to-PECL Translator Multiplexer LVDS TTL/CMOS LVDS/HCSL Loop Filter VCO 10 ZDB ASIC Memory 1 CMOS/TTL Divider/ Prescaler PE/EQ Processor 9 1 Discrete PLL Blocks Processor 5 1 PECL/CML Phase


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    PDF BRD8042-4 BRD8042/D led clock circuit diagram ECL IC NAND ic 3842 datasheet DAC ic 0808 pin diagram 3842 smps IC 8 pin ic 3842 MCK12140 application note ADC 10 Ghz 266 XnOR GATE NB3N551

    2N6284 inverter schematic diagram

    Abstract: NTD18N06 MKP9V160 sine wave inverter tl494 circuit diagram ECL IC NAND adp3121 DARLINGTON TRANSISTOR ARRAY ezairo MC74HC4538 TIP142 6403 F
    Text: ON Semiconductor Master Components Selector Guide AC−DC Controllers and Regulators; Amplifiers and Comparators; Analog Switches; Bipolar Transistors; Clock and Data Distribution; Clock Generation; Custom; DC−DC Controllers, Converters, and Regulators; Digital


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    PDF SG388/D 2N6284 inverter schematic diagram NTD18N06 MKP9V160 sine wave inverter tl494 circuit diagram ECL IC NAND adp3121 DARLINGTON TRANSISTOR ARRAY ezairo MC74HC4538 TIP142 6403 F

    Xilinx XC2000

    Abstract: PQFP160 XILINX X5777 xc8100 Xilinx CMOS TD078 XC4000 XC5200 XC8101 XC8103
    Text:  XC8100 FPGA Family June 1, 1996 Version 1.0 Preliminary Product Specification Features Description • The XC8100 family of field programmable gate arrays (FPGAs) provides the same overall benefits as other Xilinx FPGAs: fast time-to-market, reduced design risk, low


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    PDF XC8100 FamilyXC8100 XC8106-1 PC84C X5944 XC8100-1 XC8101-1 XC8103-1 Xilinx XC2000 PQFP160 XILINX X5777 Xilinx CMOS TD078 XC4000 XC5200 XC8101 XC8103

    tag 8634

    Abstract: TOP 242 PN C15-32 LT 7232 FR 220 em-18 gi 9232 GP32 gx16 SDH 209
    Text: ST122 DSP CORE REFERENCE GUIDE Release 1.0 ST122 Implementation 1.0 1/408 2/408 ST122 DSP CORE REFERENCE GUIDE TABLE OF CONTENTS TABLE OF CONTENTS 1 PAGE ST122 OVERVIEW .


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    PDF ST122 ST100 ST122CRG tag 8634 TOP 242 PN C15-32 LT 7232 FR 220 em-18 gi 9232 GP32 gx16 SDH 209

    8 bit full adder

    Abstract: LD78 CDUD4 CBU12 266 XnOR GATE BI48 CBD12 FD51 mux24 MUX82
    Text: ispLSI Macro Library Reference Manual Version 8.2 Technical Support Line: 1-800-LATTICE or 408 826-6002 IDE-ISPML-RM 8.2.1 Copyright This document may not, in whole or part, be copied, photocopied, reproduced, translated, or reduced to any electronic medium or machine-readable form without


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    PDF 1-800-LATTICE licT38 SRR11 SRR14 SRR18 SRR21 SRR24 SRR28 SRR31 SRR34 8 bit full adder LD78 CDUD4 CBU12 266 XnOR GATE BI48 CBD12 FD51 mux24 MUX82

    icl 2822

    Abstract: 1004CL 0398C BW002 CCGA 472 device dimensional details diode marking B4Z 0844C 4046 PLL Designers Guide AOI2222 2-bit comparator
    Text: Preliminary ASIC Cu-11 Databook Notices: Before using this information and the product it supports, be sure to read the general information on the back cover of this book. Trademarks: The following are trademarks or registered trademarks of International Business Machines


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    PDF Cu-11 SA14-2449-00 icl 2822 1004CL 0398C BW002 CCGA 472 device dimensional details diode marking B4Z 0844C 4046 PLL Designers Guide AOI2222 2-bit comparator

    RAM64K36

    Abstract: RAM64K36P 54SX-S MXT 276 BBUF RAM64 20/FIFO64K36
    Text: Macro Library Guide June 2002 R1-2002 For more information about Actel’s products, call 888-99-ACTEL or visit our Web site at http://www.actel.com Actel Corporation • 955 East Arques Avenue • Sunnyvale, CA USA 94086 U.S. Toll Free Line: 888-99-ACTEL • Customer Service: 408-739-1010 • Customer Service FAX: 408-522-8044


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    PDF R1-2002 888-99-ACTEL 888-99-ACTEL RAM64K36 RAM64K36P 54SX-S MXT 276 BBUF RAM64 20/FIFO64K36

    EP610

    Abstract: EP900I programming manual EP910 H123A EPM5064 FLIPFLOP SCHEMATIC EP1810 EP600I EP910 Max Plus II Tutorial
    Text: 81_GSBOOK.fm5 Page 277 Tuesday, October 14, 1997 4:04 PM Appendix A MAX+PLUS II Command-Line Mode You can operate the MAX+PLUS II Compiler, Timing Analyzer, and Simulator from the command prompt under UNIX, Microsoft Windows NT, and Microsoft Windows 95. Altera Corporation


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    PT43C

    Abstract: PR41C pin diagram of ic 7495 shift register CORE F5A Y 928 K00 064 PT42C 21-INPUT pr46c OR4E10 k72 u2
    Text: Preliminary Data Sheet August 2000 ORCA Series 4 Field-Programmable Gate Arrays Programmable Features • ■ High-performance platform design. — 0.13 µm seven-level metal technology. — Internal performance of >250 MHz four logic levels . — I/O performance of >416 MHz for all user I/Os.


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    PDF DS00-221FPGA PT43C PR41C pin diagram of ic 7495 shift register CORE F5A Y 928 K00 064 PT42C 21-INPUT pr46c OR4E10 k72 u2

    transistor pt36c

    Abstract: PT18C datasheet transistor pt36C transistor pt42c pt36c pt35c transistor pt31C pt31c PL34C PT36c transistor
    Text: Preliminary Data Sheet December 2000 ORCA Series 4 Field-Programmable Gate Arrays Programmable Features • ■ High-performance platform design. — 0.13 µm seven-level metal technology. — Internal performance of >250 MHz four logic levels . — I/O performance of >416 MHz for all user I/Os.


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    PDF DS01-024NCIP DS00-221FPGA) transistor pt36c PT18C datasheet transistor pt36C transistor pt42c pt36c pt35c transistor pt31C pt31c PL34C PT36c transistor

    SCH5017-NW

    Abstract: SCH5017 SMSC SCH5017 a8000B marking codes ER diode SMB sch5 assembly instruction 27266 HP-95LX DIODE GP54
    Text: SCH5017 Super I/O with Temperature Sensing, Quiet Auto Fan and Glue Logic PRODUCT FEATURES „ General Features — — — — — — — — — — — „ „ „ Datasheet „ 3.3 Volt Operation SIO Block is 5 Volt Tolerant LPC Interface Programmable Wake-up Event Interface


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    PDF SCH5017 PC2001 SCH5017 SCH5017-NW SMSC SCH5017 a8000B marking codes ER diode SMB sch5 assembly instruction 27266 HP-95LX DIODE GP54

    CY8C20636

    Abstract: push button using psoc to activate a counter cy8c20436a CY8C203
    Text: PSoC CY8C20x66, CY8C20x46 TRM PSoC CY8C20x66, CY8C20x66A, CY8C20x46/96, CY8C20x46A/96A, CY8C20x36, CY8C20x36A Technical Reference Manual TRM Document No. 001-22219 Rev. *E November 11, 2009 Cypress Semiconductor 198 Champion Court San Jose, CA 95134-1709


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    PDF CY8C20x66, CY8C20x46 CY8C20x66A, CY8C20x46/96, CY8C20x46A/96A, CY8C20x36, CY8C20x36A CY8C20x36/46/66/96 CY8C20636 push button using psoc to activate a counter cy8c20436a CY8C203

    SCH5017

    Abstract: 277 FAN SMSC SCH5017 SCH5017-NW intel desktop board SERVICE MANUAL regulator handbook 8042 "Keyboard Controller" address 12021 floppy disk controller HP-95LX
    Text: SCH5017 Super I/O with Temperature Sensing, Quiet Auto Fan and Glue Logic PRODUCT FEATURES • General Features — — — — — — — — — — — ■ ■ ■ Datasheet ■ 3.3 Volt Operation SIO Block is 5 Volt Tolerant LPC Interface Programmable Wake-up Event Interface


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    PDF SCH5017 PC2001 SCH5017 277 FAN SMSC SCH5017 SCH5017-NW intel desktop board SERVICE MANUAL regulator handbook 8042 "Keyboard Controller" address 12021 floppy disk controller HP-95LX

    GDI PUMP DRIVE

    Abstract: GI 312 diode 2 bit magnitude comparator using 2 xor gates Crystal oscillators 48.000 cy8c24423 used 4 digit display led display board using psoc CY8C24123 CY8C24123-24PI CY8C24123-24SI CY8C24223
    Text: CY8C24123, CY8C24223, CY8C24423 PSoC Mixed Signal Array Preliminary Data Sheet For Silicon Revision A December 22, 2003 Cypress MicroSystems 2700 162nd Street SW Building D Lynnwood, WA 98037 Phone: 800.669.0557 FAX: 425.787.4641 http://www.cypress.com


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    PDF CY8C24123, CY8C24223, CY8C24423 162nd CY8C24xxx GDI PUMP DRIVE GI 312 diode 2 bit magnitude comparator using 2 xor gates Crystal oscillators 48.000 cy8c24423 used 4 digit display led display board using psoc CY8C24123 CY8C24123-24PI CY8C24123-24SI CY8C24223

    GDI PUMP DRIVE

    Abstract: CY8C24123 CY8C24123-24PI CY8C24123-24SI CY8C24223 CY8C24223-24PI CY8C24223-24PVI CY8C24223-24PVIT CY8C24223-SI CY8C24223-SIT
    Text: CY8C24123, CY8C24223, CY8C24423 PSoC Mixed Signal Array Preliminary Data Sheet For Silicon Revision A December 22, 2003 Cypress MicroSystems 2700 162nd Street SW Building D Lynnwood, WA 98037 Phone: 800.669.0557 FAX: 425.787.4641 http://www.cypress.com


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    PDF CY8C24123, CY8C24223, CY8C24423 162nd CY8C24xxx othe003 GDI PUMP DRIVE CY8C24123 CY8C24123-24PI CY8C24123-24SI CY8C24223 CY8C24223-24PI CY8C24223-24PVI CY8C24223-24PVIT CY8C24223-SI CY8C24223-SIT

    CY8C24xxx

    Abstract: CY8C24423-24PI UV tape D-175
    Text: CY8C24123, CY8C24223, CY8C24423 PSoC Mixed Signal Array Preliminary Data Sheet For Silicon Revision A December 4, 2003 Cypress MicroSystems 2700 162nd Street SW Building D Lynnwood, WA 98037 Phone: 800.669.0557 FAX: 425.787.4641 http://www.cypress.com Document No. 38-12011 Rev. *D


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    PDF CY8C24123, CY8C24223, CY8C24423 162nd CY8C24xxx CY8C24423-24PI UV tape D-175

    k1377

    Abstract: MPA1064DH B1582 M20214 MPA1064KE MPA1016DD MPA1016FN MPA1000 MPA1036DH MPA1036FN
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MPA1000 Product Description future design migration efforts. The combination of automatic tools and gate level architecture is ideal for traditional schematic driven or high level language based design methodologies. In fact, logic synthesis tools were originally


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    PDF MPA1000 RS232 33MHz X11r5 DL201 k1377 MPA1064DH B1582 M20214 MPA1064KE MPA1016DD MPA1016FN MPA1036DH MPA1036FN

    74LS 2 input xnor gate

    Abstract: 266 XnOR GATE 74LS series logic gates 3 input xor gate 74LS XOR gate 74LS 3 input xnor gate U/25/20/TN26/15/850/SPXXHC02 CMOS XNOR Gates 74LS series logic gates spxxhc02 74LS
    Text: Features • U tiliz e s S P I’s S e le c tiv e O x id a tio n , S ilic o n -G a te C M O S Process. ■ S peed, fu n c tio n and pin*out c o m p a tib le to 74LS s e rie s Logic. ■ H igh N o ise Im m u n ity . ■ L o w q u ie s c e n t po w e r c o n s u m p tio n .


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    PDF SPXXHC02 SPXXHC27 SPXXHC32 SPXXHC86 SPXXHC266 74LS 2 input xnor gate 266 XnOR GATE 74LS series logic gates 3 input xor gate 74LS XOR gate 74LS 3 input xnor gate U/25/20/TN26/15/850/SPXXHC02 CMOS XNOR Gates 74LS series logic gates 74LS

    TA138

    Abstract: DLM8 TPC-ALS-249 TPC1020B 4584P TA273 CNT4A
    Text: TPC10 SERIES CMOS FIELD-PROGRAMMABLE GATE ARRAYS S R FS 001F - D3864, DECEM BER 19B9 - R EVISED FEBRUARY 1993 • • Four Arrays With up to 2000 Usable Equivalent Gates Tl Action Logic System TI-ALS Software for: - ViewLogic™ - Mentor™ - OrCAD/SDT III ™


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    PDF TPC10 D3864, 4-to-16 DEC4X16A TA164 TA194 TA195 0-P15 TA138 DLM8 TPC-ALS-249 TPC1020B 4584P TA273 CNT4A

    IC A01B

    Abstract: sb5051 A04A DLM8 TPC-ALS-245 isolated nm 232 "hp400" TA164 zl54 N4724
    Text: TPC10 SERIES CMOS FIELD-PROGRAMMABLE GATE ARRAYS S R FS 00 1 F - D3864, DE CE M B E R 1989 - REVISED FEBR UARY 1993 • • • • • • Four Arrays With up to 2000 Usable Equivalent Gates Tl Action Logic System TI-ALS Software for: - View Logic™


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    PDF TPC10 SRFS001F D3864, TA138 4-to-16 Y0-Y15 DEC4X16A TA195 IC A01B sb5051 A04A DLM8 TPC-ALS-245 isolated nm 232 "hp400" TA164 zl54 N4724

    Untitled

    Abstract: No abstract text available
    Text: sirice LPC47S42X STANDARD MICROSYSTEMS CORPORATION Enhanced Super I/O Controller with LPC Interface for Server Applications FEATURES 3.3 Volt Operation 5V Tolerant Floppy Disk Controller (Supports Two FDCs) Multi-Mode Parallel Port Two UARTs 8042 Keyboard Controller


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    PDF 82077AA LPC47S42x

    CORE F5A

    Abstract: No abstract text available
    Text: Preliminary Data Sheet August 2000 m i c r o e le c t r o n ic s group Lucent Technologies Bell Labs Innovations ORCA Series 4 Field-Programmable Gate Arrays Programmable Features • High-performance platform design. — 0.13 pm seven-level metal technology.


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    PDF DS00-221FPGA CORE F5A

    6N0 953 235

    Abstract: No abstract text available
    Text: Preliminary Data Sheet microelectronics group Lucent Technologies Bell Labs Innovations ORCA OR3Cxx 5 V and OR3Txxx (3.3 V) Series Field-Programmable Gate Arrays Features • High-performance, cost-effective, 0.35 nm 4-level metal technology, with a migration plan to 0.25 urn


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    PDF 16-bit 208-Pin 240-Pin 256-Pin 352-Pin 432-Pin 600-Pin PS208 PS240 BA256 6N0 953 235