270920 Search Results

Contextual Info: 13 12 11 PLUG PART NOn 03- 09- 206 I 10 RECEPTACLE ENG. NOn 126 1-P A PART NOn 0 3 - 0 9 - I0 6 I I26 - R 23-09- 206 I 126 1- P- 100 2 3 - 0 9 - I0 6 I I26 - R- I00 03- 09- 2052 126 1-PI 0 3 - 0 9 - I062 I26 - R l 23-09-2062 126 1- PI-100 2 3 - 0 9 - I062

Contextual Info: in te i 80L188EB-13 -8 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR • 3V O p e ra tio n , VCc = 2 .7 V -5 .5 V • F u ll S ta tic O p e ra tio n • T ru e C M O S In p u ts a n d O u tp u ts • - 40°C to + 85°C O p e ra tin g T e m p e ra tu re R a n g e

Contextual Info: 10 13 PLUG PART NO. 03-09-206 I 23-09-206 I 03-09-2062 RECEPTACLE ENG. NO. 7K I26I-P I26I-P-I00 I26I-PI 23-09-2062 I26I-PI-I00 03-09-706 I 03-09-7062 I26I-PBK I26I-PIBK 27-09-2093 50-29-0099 I26 I-PI-20 0 I26 I-PI-30 0 A " PART NO. ENG. NO. 0 3 - 0 9 - I06I

80C17

Abstract: Intel 80188EB 270803 ts80c186eb20 80188eb processor 80L186EB tn80c186eb20 STC transistors K 2149 TN80C186EB20 equivalent
Contextual Info: 4ñSbl7S 013Sflfi7 HT3 bflE D INTEL CORP UP/PRPHLS p R iu iB o iM A O f t f in te i 80C186EB/80C188EB AND 80L186EB/80L188EB 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS • Full Static Operation ■ True CMOS Inputs and Outputs ■ - 40°C to + 85°C Operating Temperature Range

Contextual Info: Product Number: 2709-2-07-01-00-00-07-0 Description: 2709 - Turret Terminal Pin Packaging: Packaged in Bulk Mill-Max Part Number Shell Plating Contact Plating 2709-2-07-01-00-00-07-0 200 - 300 " Tin/Lead over Nickel 00 RoHS Compliant SHELL MATERIAL:

Contextual Info: Product Number: 2709-2-07-80-00-00-07-0 Description: 2709 - Turret Terminal Pin Packaging: Packaged in Bulk Mill-Max Part Number Shell Plating Contact Plating 2709-2-07-80-00-00-07-0 200 - 300 " Tin matte finish over Nickel 00 RoHS Compliant SHELL MATERIAL:

intel 80188eb

Abstract: 80C186es 80186EB transistor A4t 78 TS80C186EB20 intel 80c188EB13 TN80C186EB20 186eb16 sol 4011 be 80C186EB
Contextual Info: 80C186EB/80C188EB AND 80L186EB/80L188EB 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS • Full Static Operation ■ True CMOS Inputs and Outputs ■ Integrated Feature Set — Low-Power Static CPU Core — Two Independent UARTs each with an Integral Baud Rate Generator

Contextual Info: 13 10 12 Sll 1 W á A Ä ä_ 114.2 .56 r - OP T IO N AL MOUNTING E A R S 17.0) ( P R E - B E N T E A R S SHOWN) SEE D E T A I L S 3 & 4, DRAWING SD -1292-0003 OPT IO N AL LOCK RAMP S r r (16.00) RECEPTACLE .63 ( + ed lt 0d+ +) (SHOWN WITH P R E B E N T MOUNTING E A R S & LOCK RAM PS)

Contextual Info: Product Number: 2709-2-07-50-00-00-07-0 Description: 2709 - Turret Terminal Pin Packaging: Packaged in Bulk Mill-Max Part Number Shell Plating Contact Plating 2709-2-07-50-00-00-07-0 300 - 500 " Electro-Solder 60/40 Tin/Lead 00 RoHS Compliant SHELL MATERIAL:

Contextual Info: Product Number: 2709-2-07-44-00-00-07-0 Description: 2709 - Turret Terminal Pin Packaging: Packaged in Bulk Mill-Max Part Number Shell Plating Contact Plating 2709-2-07-44-00-00-07-0 300 " Silver over Copper 00 RoHS Compliant SHELL MATERIAL: BRASS ALLOY UNS C36000 per ASTM B 16

Contextual Info: Product Number: 2709-2-07-50-00-00-07-0 Description: 2709 - Turret Terminal Pin Packaging: Packaged in Bulk Mill-Max Part Number Shell Plating Contact Plating 2709-2-07-50-00-00-07-0 300 - 500 " Electro-Solder 60/40 Tin/Lead 00 RoHS Compliant SHELL MATERIAL:

80186EB

Abstract: sol 4011 be AD350 80C186es intel 80188eb 80C186EB 80C187 270920 270803 8OC188
Contextual Info: 80C186EB/80C188EB AND 80L186EB/80L188EB 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS • Full Static Operation ■ True CMOS Inputs and Outputs ■ Integrated Feature Set — Low-Power Static CPU Core — Two Independent UARTs each with an Integral Baud Rate Generator

Contextual Info: ß ftlü L D Q M M V in te i 80C186EB/80C188EB AND 80L186EB/80L188EB 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS • Full Static Operation ■ True CMOS Inputs and Outputs Integrated Feature Set — Low-Power Static CPU Core — Two Independent UARTs each with

Contextual Info: 80C186EB/80C188EB AND 80L186EB/80L188EB 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS • Full Static Operation ■ True CMOS Inputs and Outputs ■ —40°C to + 85°C Operating Temperature Range Integrated Feature Set l Speed Versions Available 3V : — Low-Power Static CPU Core

I-300

Contextual Info: PL U G „ 56 3 14.30 .434 O P T I O N A L MOUNTING E A R ( P R E B E N T SHOWN) SEE D ETAIL 3 & 4 C IR C U IT I.D. G P L )A 126 I ( 16.05) .I9 8 ± .0 O 5 (5 .0 3 ± O . 13) ' ADD -P I-30 0 & .R 3 -3 0 0 U C P 2 0 0 3 - 1992 ELHAG <33-03-2 X2 R EV IS E D

1292-P

Abstract: 03-09-2092
Contextual Info: 1292 O P T IO N A L PLUG SHOWN WITH PREBEN T MOUNTING EARS FOR A LL OTHER DIMENSIONS AND SPECS S E E STANDARD PLUG ON SH EET I. MOUNTING EAR OPTION S E E D E TA IL 4 AND NOTE 3 1292 OIPCNSCONS SHO(IN (METRICI INCH UH-ESS OTHER(IISE SP! TOLERANCES:ANGULAR'^ BÏ 2 c

Contextual Info: 13 12 10 S ll 1 114.2 W .56 á A ä_ Ä r- OPTIONAL MOUNTING EAR S 17.0) (PRE-BENT EAR S SHOWN) SEE D ETAILS 3 & 4, DRAWING SD-1292-0003 OPTIONAL LOCK RAMPS r r (16.00) RECEPTACLE .63 (+edlt0d+) x i (SHOWN WITH PREBENT MOUNTING EARS & LOCK RAMPS) < 5.03 _

intel 80188eb

Abstract: 80186EB 80L188EB 80C186EB 80C186EB13 80C186EB20 80C186EB25 80C188EB 80188eb processor 80C188EB20
Contextual Info: 80C186EB 80C188EB AND 80L186EB 80L188EB 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS X Y X Full Static Operation True CMOS Inputs and Outputs Integrated Feature Set Low-Power Static CPU Core Two Independent UARTs each with an Integral Baud Rate Generator Two 8-Bit Multiplexed I O Ports

800GA126D

Contextual Info: SKM 800GA126D  ,* -     $ Absolute Maximum Ratings Symbol Conditions IGBT ' . ,* - " . 0*+ - "34 0,+  1 + #   2+ - ,+ # 0,+ # 6 ,+  0+ 9   ,* - 2+ #   0,* - ;<+ # 0,+ # > + # *+ # A ;+ = B 0*+

80L188EB16

Abstract: intel 8086 opcode instruction 80188EB intel 80188eb 80C186EB20 80c188eb processor 80186EB
Contextual Info: 80C186EB 80C188EB AND 80L186EB 80L188EB 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS X Y X Full Static Operation True CMOS Inputs and Outputs Integrated Feature Set Low-Power Static CPU Core Two Independent UARTs each with an Integral Baud Rate Generator Two 8-Bit Multiplexed I O Ports

Contextual Info: I H 1292 R E V IS E D U C R 2 0 0 2 - 1108 T W KAM AR S2 S T A M B A IU SI STANDARD PLUG SHOWN WITH PR E BE N T R E V IS E D EC N U T 1268 W ANG 9 7 -4 -2 2 R R E V . 8. R E D R A W N , EC R U9 0 0 4 3 G E P 2 - 1 8 - 8 9 RW R LTR. DIMENSIONS SHOWN (METRIC INCH

80186EB

Abstract: 80188EB order 231369 l186eb16 Intel 80188EB 80L188EB16 80L188EB13 80C186EB 80C186EB13 80C186EB20
Contextual Info: 80C186EB 80C188EB AND 80L186EB 80L188EB 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS X Y X Full Static Operation True CMOS Inputs and Outputs Integrated Feature Set Low-Power Static CPU Core Two Independent UARTs each with an Integral Baud Rate Generator Two 8-Bit Multiplexed I O Ports

80188EB

Abstract: 80186EB Intel 80188EB 80C188EB20 80C186 80C186EB 80C187 270803 80C186XL 80L188EB13
Contextual Info: 80C186EB/80C188E B AND 80L186EB/80L188EB 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS • Full Static Operation ■ True CMOS Inputs and Outputs ■ Integrate d Feature Set ■ Available in Extended Temperature — Low-Power Static CPU Core — Two Independent UARTs each with

R3300

Abstract: PI-300 MOLEX 6 pin
Contextual Info: 13 10 1 .563 14.30 0.632 (I6.05) A OPTIONAL MOUNTING EAR (PREBENT SHOWN) SEE DETAIL 3 & A CIRCUIT I.D. (3 P L . ) ^ I I [ Ixi o L i 4 , T T in I i n “ . i mi mi i _i i mi mi i i_ . . I98±.005 •I98±.005 (2 PL.) (5.03±0.I3) (5 .0 3 ± 0 .13)