2SF40 Search Results

Contextual Info: Issue 5.1 May 2001 Description The 2SF4006 is a mixed technology ceramic PGA module organised as 128K x 16 SRAM and 128K x 16 FLASH. The PUMA2 has a industry standard footprint, the device can be user configured as 8 or 16 bit wide. High speed 5V FLASH and SRAM technology is

Contextual Info: ir v tJ . 4-MBIT 256K x 16, 512K x 8 LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY 28F400BL-T/B, 28F004BL-T/B • Low Voltage Operation for Very Low-Power Portable Applications — Vcc = 3.0V-3.6V Read — Vcc = 3.15V-3.6V Program/Erase ■ SRAM-Compatible Write Interface

Contextual Info: in ttil « « « « « * 28F400BX-TL/BL, 28F004BX-TL/BL 4-MBIT 256K x 16, 512K x 8 LOW POWER BOOT BLOCK FLASH MEMORY FAMILY • Low Voltage Operation for Very Low Power Portable Applications — Vcc = 3.3V ±0.3V ■ x8/x16 Input/Output Architecture — 28F400BX-TL, 28F400BX-BL

TE28F800B3B90

Abstract: F160B3B
Contextual Info: SMART 3 ADVANCED BOOT BLOCK 4-MBIT, 8-MBIT, 16-MBIT FLASH MEMORY FAMILY 28F400B3, 28F80QB3, 28F160B3 28F008B3, 28F016B3 • Flexible SmartVoltage Technology — 2.7 V—3.6 V Read/Program/Erase — 12 V Vpp Fast Production Programming ■ 2.7 V or 1.65 V I/O Option

ali m 3329

Abstract: PROCESSOR ALI 3329 ali 3329 e ali 3329 b ali m 3327 ali 3329 80L188EB
Contextual Info: 4-MBIT 256K x 16, 512K x 8 LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY 28F400BL-T/B, 28F004BL-T/B m L o w V o lta g e O p e ra tio n fo r V e ry L o w -P o w e r P o rta b le A p p lic a tio n s — V Cc = 3 .0 V -3 .6 V R e a d — V c c = 3 .1 5 V -3 .6 V P ro g ra m /E ra s e

28F400BL-T

Abstract: cpu 80960kx 8Mbit nor flash memory with 3.3v as input voltage 28F004BL-B 28F004BL-T 28F400BL-B
Contextual Info: 4-MBlT 256K x 16 512K x 8 LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY 28F400BL-T B 28F004BL-T B Y Y Y Y Low Voltage Operation for Very Low-Power Portable Applications VCC e 3 0V – 3 6V Read VCC e 3 15V – 3 6V Program Erase Y SRAM-Compatible Write Interface

2SF40

Abstract: a106 diode 94vo t4 SAH001 UL60079 IEC EXD ENCLOSURE crouse-hinds
Contextual Info: 1A Cl. I, Div. 2, Groups A, B, C, D Cl. I, Zone 1, Groups IIC Cl. II, Div. 1, Groups E, F, G D2Z Panelboards Zone 1, Division 2 AEx de II C T4, T6 Ex de IIC T4, T6 NEMA 4X, IP 65 Non-metallic or Stainless Steel Applications: D2Z panelboards are designed specifically for use in:

"NOR Flash" intel 28f

Abstract: 486TM 80L188EB intel PLD
Contextual Info: INTEL CORP {flEMORY/PLD/ L7E D in t e l • 4fl2bl7b 0001 373 S>40 ■ P O IIilL D B S lO K IM V 28F400BX-TL/BL, 28F004BX-TL/BL 4-MBIT (256K x 1 6 ,512K x 8 LOW POWER BOOT BLOCK FLASH MEMORY FAMILY ■ Low Voltage Operation for Very Low Power Portable Applications

Contextual Info: in te i 28F400BL-T/B, 28F004BL-T/B 4-MBIT 256K x 16, 512K x 8 LOW POWER BOOT BLOCK FLASH MEMORY FAMILY • Low Voltage Operation for Very Low Power Portable Applications — Vcc = 3.0V-3.6V Read — Vcc = 3.15V-3.6V Program/Erase ■ SRAM-Compatible Write Interface

Contextual Info: Issue 5.1 May 2001 Description The 2SF4006 is a mixed technology ceramic PGA module organised as 128K x 16 SRAM and 128K x 16 FLASH. The PUMA2 has a industry standard footprint, the device can be user configured as 8 or 16 bit wide. High speed 5V FLASH and SRAM technology is

Contextual Info: ^ MITSUBISHI LSIs M 5 M 2 8 F 4 0 0 F P ,V P , R V -1 0 ,-1 2 ,-1 5 ^ 4194304-BIT 524288-WORD BY 8-BIT/262144-WORD BY 16-BIT CMOS FLASH MEMORY DESCRIPTION The M itsubishi M 5 M 2 8 F 4 0 0 F P , VP , RV are h ig h -s p e e d PIN CONFIGURATION (TOP VIEW) 4 1 9 4 3 0 4 - bit CMOS Flash Memories. They are suitable fo r

Contextual Info: intûl * 28F400BX-TL/BL, 28F004BX-TL/BL 4-MBIT 256K x 16,512K x 8 LOW POWER BOOT BLOCK FLASH MEMORY FAMILY • Low Voltage Operation for Very Low Power Portable Applications — VCc = 3.3V ±0.3V ■ Automatic Power Savings Feature — 0.8 mA typical Ice Active Current in