320PS Search Results

Contextual Info: 2.5V/3.3V 1:10 DIFFERENTIAL LVPECL/LVECL/HSTL CLOCK DRIVER Precision Edge SY100EP111U FINAL FEATURES • 2.5V and 3.3V power supply options ■ Guaranteed AC parameters over temperature: • fMAX = 3GHz • < 25ps output-to-output skew • < 320ps tr / tf

SY10EP51VZG

Abstract: transistor k81 hep51 SY10EP51V SY10EP51VKC SY10EP51VKCTR SY10EP51VZC SY10EP51VZCTR
Contextual Info: ECL Pro ECLSY10EP51V Pro™ SY10EP51V 5V/3.3V D FLIP-FLOP WITH RESET AND DIFFERENTIAL CLOCK Micrel, Inc. FEATURES • ■ ■ ■ ■ ■ 3.3V and 5V power supply options 320ps typical propagation delay Maximum frequency > 3GHz typical 75Ω internal input pulldown resistor

Contextual Info: 5V/3.3V D FLIP-FLOP WITH RESET AND DIFFERENTIAL CLOCK ECL Pro SY10EP51V FINAL FEATURES • ■ ■ ■ ■ ■ 3.3V and 5V power supply options 320ps typical propagation delay Maximum frequency > 3GHz typical 75Ω internal input pulldown resistor Transistor count: 143

Contextual Info: 5V/3.3V D FLIP-FLOP WITH RESET AND DIFFERENTIAL CLOCK FEATURES • ■ ■ ■ ■ ■ SY10EP51V DESCRIPTION 3.3V and 5V power supply options 320ps typical propagation delay Maximum frequency > 3GHz typical 75Ω internal input pulldown resistor Transistor count: 143

VT 1165

Contextual Info: 2.5V/3.3V 1:10 DIFFERENTIAL LVPECL/LVECL/HSTL CLOCK DRIVER FEATURES DESCRIPTION • 2.5V and 3.3V power supply options ■ Guaranteed AC parameters over temperature: • fMAX = 3GHz • < 25ps output-to-output skew • < 320ps tr / tf • < 475ps propagation delay

hep51

Abstract: H51 MICREL MLF transistor k81
Contextual Info: ECL Pro SY10EP51V ECL Pro® 5V/3.3V D FLIP-FLOP WITH RESET AND DIFFERENTIAL CLOCK Micrel, Inc. SY10EP51V FEATURES • ■ ■ ■ ■ ■ 3.3V and 5V power supply options 320ps typical propagation delay Maximum frequency > 3GHz typical 75Ω internal input pulldown resistor

transistor k81

Contextual Info: ECL Pro 5V/3.3V D FLIP-FLOP WITH RESET AND DIFFERENTIAL CLOCK Micrel ECLSY10EP51V Pro™ SY10EP51V FINAL FEATURES • ■ ■ ■ ■ ■ 3.3V and 5V power supply options 320ps typical propagation delay Maximum frequency > 3GHz typical 75Ω internal input pulldown resistor

Contextual Info: 5V/3.3V D FLIP-FLOP WITH RESET AND DIFFERENTIAL CLOCK SY10EP51V FINAL FEATURES • ■ ■ ■ ■ ■ 3.3V and 5V power supply options 320ps typical propagation delay Maximum frequency > 3GHz typical 75Ω internal input pulldown resistor Transistor count: 143

H51 MICREL MLF

Abstract: SY10EP51V SY10EP51VKC SY10EP51VKCTR SY10EP51VZC SY10EP51VZCTR transistor k81
Contextual Info: ECL Pro SY10EP51V ECL Pro® 5V/3.3V D FLIP-FLOP WITH RESET AND DIFFERENTIAL CLOCK Micrel, Inc. SY10EP51V FEATURES • ■ ■ ■ ■ ■ 3.3V and 5V power supply options 320ps typical propagation delay Maximum frequency > 3GHz typical 75KΩ internal input pulldown resistor

Contextual Info: 2.5V/3.3V 1:10 DIFFERENTIAL LVPECL/LVECL/HSTL CLOCK DRIVER FEATURES DESCRIPTION • 2.5V and 3.3V power supply options ■ Guaranteed AC parameters over temperature: • fMAX = 3GHz • < 25ps output-to-output skew • < 320ps tr / tf • < 475ps propagation delay

SY10EP51V

Abstract: SY10EP51VKI SY10EP51VKITR SY10EP51VZI SY10EP51VZITR
Contextual Info: 5V/3.3V D FLIP-FLOP WITH RESET AND DIFFERENTIAL CLOCK FEATURES • ■ ■ ■ ■ ■ SY10EP51V FINAL DESCRIPTION 3.3V and 5V power supply options 320ps typical propagation delay Maximum frequency > 3GHz typical 75Ω internal input pulldown resistor Transistor count: 143

EE 1605

Abstract: SY100EP111 SY100EP111U SY100EP111UTI SY100EP111UTITR XEP111U
Contextual Info: 2.5V/3.3V 1:10 DIFFERENTIAL LVPECL/LVECL/HSTL CLOCK DRIVER FEATURES DESCRIPTION • 2.5V and 3.3V power supply options ■ Guaranteed AC parameters over temperature: • fMAX = 3GHz • < 25ps output-to-output skew • < 320ps tr / tf • < 475ps propagation delay

Contextual Info: TLK3118 Redundant XAUI Transceiver www.ti.com • • • • • • • • • • • Fabricated in Advanced 130-nm CMOS Technology Package: Small Footprint 21x21mm, 400-Ball, Fine Pitch 1mm PBGA TLK3118 TDP/N[3:0]0 TCLK TD(31.0) TC(3.0) RCLK RD(31.0)

LVDS register

Contextual Info: CDCE72010 SCAS858C – JUNE 2008 – REVISED JANUARY 2012 www.ti.com Ten Output High Performance Clock Synchronizer, Jitter Cleaner, and Clock Distributor Check for Samples: CDCE72010 FEATURES 1 • • • • • • • • • • • • • • High Performance LVPECL, LVDS, LVCMOS

FN55

Abstract: MC68040 MC88915 MC88915FN55 MC88915FN70 Nippon capacitors
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC88915 Low Skew CMOS PLL Clock Driver The MC88915 Clock Driver utilizes phase–locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock

SY58606U

Abstract: SY58606UMG SY58606UMGTR SY58607U SY58608U
Contextual Info: SY58606U 4.25Gbps Precision, 1:2 CML Fanout Buffer with Internal Termination and Fail Safe Input General Description The SY58606U is a 2.5/3.3V, high-speed, fully differential 1:2 CML fanout buffer optimized to provide two identical output copies with less than 15ps of skew

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C 88915 Low S kew CMOS PLL Clock Driver The MC88915 Clock Driver utilizes phase-locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock

FN55

Abstract: MC68040 MC88915 MC88915FN55 MC88915FN70 Nippon capacitors
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC88915 Low Skew CMOS PLL Clock Driver The MC88915 Clock Driver utilizes phase–locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock

IDT8SLVP1204I

Contextual Info: Low Phase Noise, 1-to-4, 3.3V, 2.5V LVPECL Output Fanout Buffer IDT8SLVP1204I DATASHEET General Description Features The IDT8SLVP1204I is a high-performance differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The

ECPD07

Contextual Info: Cell-Based IC RC Effects in Nets Cell-Based IC CBIC Overview This CBIC Application Note explains how RC effects can occur and be modelled in nets. This is of particular importance when planning the routing and track width of clock nets. Introduction At placement and routing, wiring is done

Contextual Info: SY58606U 4.25Gbps Precision, 1:2 CML Fanout Buffer with Internal Termination and Fail Safe Input General Description Features The SY58606U is a 2.5/3.3V, high-speed, fully differential 1:2 CML fanout buffer optimized to provide two identical output copies with less than 15ps of skew

net eN8

Abstract: TDN01 crpa 8B10B P802 TLK3118 XGXS quad video processor
Contextual Info: TLK3118 Redundant XAUI Transceiver www.ti.com SLLS628C – DECEMBER 2004 – REVISED APRIL 2007 • • • • • • • • • • • Technology Package: Small Footprint 21x21mm, 400-Ball, Fine Pitch 1mm PBGA TLK3118 TDP/N[3:0]0 TCLK TD(31.0) TC(3.0)

max3764

Abstract: HFAN-02 MAX3646 MAX3646ETG 1310nm TRANSCEIVER CIRCUIT DIAGRAM
Contextual Info: 19-3161; Rev 1; 7/04 KIT ATION EVALU E L B AVAILA 155Mbps to 622Mbps SFF/SFP Laser Driver with Extinction Ratio Control Features The MAX3646 is a +3.3V laser driver designed for multirate transceiver modules with data rates from 155Mbps to 622Mbps. Lasers can be DC-coupled to

ALI chipset

Abstract: KM266 SIS 650 Via KM266 48MHZ M1671 PLL202-151 ali m1671 KM26
Contextual Info: PRELIMINARY PLL202-151 Programmable Clock Generator for VIA, ALI and SIS DDR SYSTEM FEATURES • • • • • • • • • • • • • Supports VIA P4M/KM266, ALI M1671 and SIS 645/650 Chipsets. Programmable Spread Spectrum Modulation from ±0.1% to ±1.5% with minim u m step size of