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396MW Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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TSOP 54 PINContextual Info: IBM0165160B 4M x 16 DRAM Features • Low Power Dissipation - Active: 504mW/432mW/396mW max - Standby (LVTTL Inputs): 7.2mW (max) - Standby (LVCMOS Inputs): 720mW (max) • 4,194,304 word by 16 bit organization • Single 3.3 ± 0.3V power supply • 4096 refresh cydes/64ms |
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IBM0165160B cydes/64ms 504mW/432mW/396mW 720mW TSOP-54 500milx875mil) 110ns 130ns IBM0165160BT5A fabricate01 TSOP 54 PIN | |
Contextual Info: TOSHIBA TC5164 5 805AJ/AFT/AJS/AFTS-40,-50 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 8,388,6O8-WORD X8-BIT EDO (HYPER PAGE) DYNAMIC RAM DESCRIPTION The TC5164(5)805AJ/AFT/AJS/AFTS is an EDO (hyper page) dynamic RAM organized as 8,388,608 |
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TC5164 805AJ/AFT/AJS/AFTS-40 805AJ/AFT/AJS/AFTS 32-pin | |
MSM51V17100Contextual Info: O K I Semiconductor MSM51V17100 16,777,216-Word x 1-Bit DYNAMIC RAM : FAST PAGE MODE TYPE DESCRIPTION The M SM 51V 17I00 is a new generation dynam ic organized as 16,777,216-word x 1-bit. The technology used to fabricate the M SM 51V I7100 is OKI's CM O S silicon gate process technology. |
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MSM51VI7100 216-Word MSM51V17100 cycles/32ms MSM51V17100 A0-A11 | |
msm51v17800b
Abstract: MSM51V17800 SOJ28 bsl 100
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J2G0076-17-41 MSM51V17800B/BSL MSM51V17800B/BSL 152-Word MSM51V17800B/BSLCMOS2 42CMOS 28SOJ28TSOP 04832ms2 048128msSL 28400milSOJ msm51v17800b MSM51V17800 SOJ28 bsl 100 | |
SOJ28
Abstract: bsl 100 MSM51V16800B
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J2G0074-17-41 MSM51V16800B/BSL MSM51V16800B/BSL 152-Word MSM51V16800B/BSLCMOS2 42CMOS 28SOJ28TSOP 09664ms4 096128msSL 28400milSOJ SOJ28 bsl 100 MSM51V16800B | |
17800Contextual Info: GM71V17800C GM71VS17800CL 2,097,152 WORDS x 8 BIT CMOS DYNAMIC RAM Description Features The GM71V S 17800C/CL is the new generation dynamic RAM organized 2,097,152 x 8 bit. GM71V(S)17800C/CL has realized higher density, higher performance and various functions by utilizing advanced CMOS process |
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GM71V17800C GM71VS17800CL GM71V 17800C/CL 17800 | |
HY51VSContextual Info: HY51V S 16160HG/HGL 1M x 16Bit Fast Page DRAM PRELIMINARY DESCRIPTION The HY51V(S)16160HG/HGL is the new generation dynamic RAM organized 1,048,576 words x 16bit. HY51V(S)16160HG/HGL has realized higher density, higher performance and various functions by utilizing advanced CMOS process technology. The HY51V(S)16160HG/HGL offers Fast Page Mode as a high |
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HY51V 16160HG/HGL 16Bit 16160HG/HGL 16bit. HY51VS | |
Contextual Info: HY51V S 65163HG/HGL 4M x 16Bit EDO DRAM PRELIMINARY DESCRIPTION This familiy is a 64Mbit dynamic RAM organized 4,194,304 x 16bit configuration with Extended Data Out mode CMOS DRAMs. Extended data out mode is a kind of page mode which is useful for the read operation. The advanced circuit and process allow this device to achieve high performance and low power dissipation. Features are access time(45ns or 50ns) and refresh cycle(4K ref ) and power consumption (Normal |
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HY51V 65163HG/HGL 16Bit 64Mbit 100us. 400mil 50pin | |
Contextual Info: HY51V S 16163HG/HGL 1M x 16Bit EDO DRAM PRELIMINARY DESCRIPTION The HY51V(S)16163HG/HGL is the new generation dynamic RAM organized 1,048,576 words x 16bit. HY51V(S)16163HG/HGL has realized higher density, higher performance and various functions by utilizing advanced CMOS process technology. The HY51V(S)16163HG/HGL offers Extended Data Out PageMode as a high speed access mode. Multiplexed address inputs permit the HY51V(S)16163HG/HGL to be |
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HY51V 16163HG/HGL 16Bit 16163HG/HGL 16bit. | |
Contextual Info: HM51W16400 Series HM51W17400 Series 4,194,304-word x 4-bit Dynamic Random Access Memory HITACHI ADE-203-649A Z Rev. 1.0 Oct. 14, 1996 Description The Hitachi H M 51W 16400 Series, H M 51W 17400 Series are CMOS dynamic RAMs organized 4 ,194,304word X 4-bit. They employ the m ost advanced 0.5 Jim CMOS technology for high performance and low |
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HM51W16400 HM51W17400 304-word ADE-203-649A 304word 300-mil 26-pin ns/70 | |
S5400A
Abstract: RO3035
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V64400A V65400A 16Mx4, 128ms cycle/64ms) S5400A RO3035 | |
A6070M
Abstract: 780sa 7805A PI 81V17805 81v17805a
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MB81V17805A A6070M 780sa 7805A PI 81V17805 81v17805a | |
Contextual Info: SM572013001Q4GU August 1996 Rev 0 SMART Modular Technologies SM572013001Q4GU 8MByte 1M x 72 , 5.0V, CMOS DRAM Module - Buffered General Description Features The SM572013001Q4GU is a high performance, 8-megabyte dynamic RAM module organized as 1M words by 72 bits, in a 168-pin, dual-in-line (DIMM) |
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SM572013001Q4GU 168-pin, 1Mx16 74ABT16244 74ACT11244) | |
Contextual Info: SM53616100UP3UU October 1996 Rev 2A SMART Modular Technologies SM53616100UP3UU 64MByte 16M x 36 CMOS DRAM Module General Description Features The SM53616100UP3UU is a high performance, 64-megabyte dynamic RAM module organized as 16M words by 36 bits, in a 72-pin, leadless, single-in-line |
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SM53616100UP3UU SM53616100UP3UU 64MByte 64-megabyte 72-pin, SM536161002P3UU SM536161004P3UU 16Mx1 64MByte | |
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m51171Contextual Info: OKI Semiconductor MSM51V17180 1,048,576-Word x 18-Bit DYNAMIC RAM : FAST PAGE MODE TYPE DESCRIPTION The MSM51V17180 is a new generation Dynam ic RA M organized as 1,048,576-word x 18-bit configuration. The technology used to fabricate the MSM51V17180 is O K I's CM O S silicon gate process technology. |
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MSM51V17180 576-Word 18-Bit MSM51V17180 cycles/32ms m51171 | |
RS560C
Abstract: RS560 common base amplifier circuit common emitter amplifier
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RS560C RS560C RS560 common base amplifier circuit common emitter amplifier | |
RT-6Contextual Info: MITSUBISHI LS Is M5M4V4280J,TP,RT-6,-7,-8,-6S,-7S,-8S PAGE MODE 4718592-BIT 262144-WORD BY 18-BIT DYNAMIC RAM DESCRIPTION PIN CONFIGURATION (TOP VIEW) This is a family of 262144-word by 18-bit dynamic RAMs, fabricated with the high performance CMOS process, and is |
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M5M4V4280J 4718592-BIT 262144-WORD 18-BIT) 18-bit RT-6 | |
GM71V64403C
Abstract: GM71VS64403CL
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GM71V64403C GM71VS64403CL GM71V 64403C/CL 64403C/CL-5 64403C/CL-6 GM71V64403C GM71VS64403CL | |
16mx4
Abstract: HY51V64400A
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HY51V64400A HY51V65400A 16Mx4, 128ms cycle/64ms) 16Mx4 10/Sep | |
Contextual Info: GM71V64403C GM71VS64403CL 16,777,216 WORDS x 4 BIT CMOS DYNAMIC RAM Description Pin Configuration The GM71V S 64403C/CL is the new generation dynamic RAM organized 16,777,216 words by 4bits. The GM71V(S)64403C/CL utilizes advanced CMOS Silicon Gate Process Technology as well as |
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GM71V64403C GM71VS64403CL GM71V 64403C/CL 27scribed | |
Contextual Info: HY51V64800A,HY51V65800A 8Mx8, Fast Page mode 2nd Generation DESCRIPTION This family is a 64M bit dynamic RAM organized 8,388,608 x 8-bit configuration with Fast Page mode CMOS DRAMs. Fast Page mode offers high speed of random access memory within the same row. The circuit and process design allow |
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HY51V64800A HY51V65800A 128ms cycle/64ms) 12/Sep | |
MSM51V17100
Abstract: 724540
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MSM51V17100_ 216-Word MSM51V17100 cycles/32ms MSM51V17100 A0-A11 b724240 724540 | |
TI AIH
Abstract: R 161 730 000
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MSM51VI7160 576-Word 16-Bit MSM51V17160 cycles/32ms TI AIH R 161 730 000 | |
STR06Contextual Info: MITSUBISHI M E M O R Y / A S I C blE D • b 2 4 cifiSS O O l V b ? 1* 5 3 ^ ■ M I T I M ITSUBISHI L S Is M 5 M 4 V 4 2 6 0 J , L , T P , R T - 6 , - 7 , - 8 , - 6 S , - 7 S , - 8 S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM \T A f i |
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4194304-BIT 262144-WORD 16-BIT) 16-bit M5M4V4260J 44P3W-E STR06 |