4-BIT MULTIPLIER COMPONENT Search Results

Contextual Info: LE225Û 4*i« , j LF2250 12 x 10-bit Matrix Multiplier DEVICES INCO RPO RATED FEATURES DESCRIPTION □ 40 MHz Data and Computation Rate □ Nine Multiplier Array with 12-bit Data and 10-bit Coefficient Inputs □ Separate 16-bit Cascade Input and Output Ports

P 9806 AD

Abstract: diagram for 4 bits binary multiplier circuit 9806 C1995 DM93S43 DM93S43N N24A binary multiplier circuit block diagram of 8*8 array multiplier diagram for 3 bits binary multiplier circuit
Contextual Info: DM93S43 4-Bit by 2-Bit Twos Complement Multiplier General Description The DM93S43 is a high-speed twos complement multiplier The device is a 4-bit by 2-bit building block that can be connected in an iterative array to perform multiplication of two binary numbers of variable lengths The device can generate the twos complement product without correction of

CD4089BCN

Abstract: 74LS AN-90 C1995 CD4089B CD4089BC CD4089BM CD4527B CD4527BC CD4527BM
Contextual Info: CD4089BM CD4089BC Binary Rate Multiplier CD4527BM CD4527BC BCD Rate Multiplier General Description Features The CD4089B is a 4-bit binary rate multiplier that provides an output pulse rate which is the input clock pulse rate multiplied by times the binary input number For example if

INTERPOLATOR SIN COS

Abstract: pwl 4700 II cic compensation filters instruction set architecture intel i7 pwl 4700 tutorial of 74hc574 INTERPOLATOR 6 BITS SIN COS OP BASEBAND 80MHZ QUADRATURE CLOCK CONVERTER simple block diagram for digital clock
Contextual Info: a CMOS 200 MSPS 14-Bit Quadrature Digital Upconverter AD9857 FEATURES 200 MHz Internal Clock Rate 14-Bit Data Path Excellent Dynamic Performance 80 dB SFDR @ 65 MHz ؎100 kHz AOUT 4؋–20؋ Programmable Reference Clock Multiplier Reference Clock Multiplier PLL Lock Detect Indicator

Contextual Info: CMOS 200 MSPS 14-Bit Quadrature Digital Upconverter AD9857 FEATURES 200 MHz internal clock rate 14-bit data path Excellent dynamic performance: 80 dB SFDR @ 65 MHz ±100 kHz AOUT 4x to 20× programmable reference clock multiplier Reference clock multiplier PLL lock detect indicator

INTERPOLATOR SIN COS

Abstract: MC100LEVL16 4MHz LC Band Pass Filter d8655 INTERPOLATOR SIN COS spi C01018 inverse sinc filter AD9856 AD9857 comb filter
Contextual Info: CMOS 200 MSPS 14-Bit Quadrature Digital Upconverter AD9857 FEATURES 200 MHz internal clock rate 14-bit data path Excellent dynamic performance: 80 dB SFDR @ 65 MHz ±100 kHz AOUT 4x to 20× programmable reference clock multiplier Reference clock multiplier PLL lock detect indicator

Contextual Info: a CMOS 200 MSPS 14-Bit Quadrature Digital Upconverter AD9857 FEATURES 200 MHz Internal Clock Rate 14-Bit Data Path Excellent Dynamic Performance 80 dB SFDR @ 65 MHz ؎100 kHz AOUT 4؋–20؋ Programmable Reference Clock Multiplier Reference Clock Multiplier PLL Lock Detect Indicator

INTERPOLATOR SIN COS spi

Abstract: video GMSK modulator AD9856 AD9857 d8655 cic filters
Contextual Info: CMOS 200 MSPS 14-Bit Quadrature Digital Upconverter AD9857 FEATURES 200 MHz internal clock rate 14-bit data path Excellent dynamic performance: 80 dB SFDR @ 65 MHz ±100 kHz AOUT 4x to 20× programmable reference clock multiplier Reference clock multiplier PLL lock detect indicator

ttl 2-bit half adder

Abstract: block diagram of 32 bit array multiplier 8 bit binary numbers multiplication 12 bit binary multiplier 2-bit half adder 8x8 bit binary multiplier 9344DC 9344DM 9344FC block diagram of 8 bit array multiplier
Contextual Info: NATIONAL SEMICOND {LOGIC} DEE D | b S O H E E ODmnS 7 I 44 T - 'f 5 ~ '° 7 CONNECTION DIAGRAM PINOUT A 9344 BINARY 4-BIT BY 2-BIT FULL MULTIPLIER n c [7 m n c |T Ü X3 ] vcc 22j T i N c [3 ¡3 x 7 Ÿ 5 [7 DESCRIPTION — The '44 is a 4-bit by 2-bit full multiplier building block.

Contextual Info: NATIONAL SEflICOND -CLOCIO Q2 E D | bSDllSB ODti Ml TE 43 1 | F-*/*T- ò 7 CONNECTION DIAGRAM PINOUT A 93S43 1 3 V cc 4-BIT BY 2-BIT TWOS COMPLEMENT MULTIPLIER C n [T | Y -ì H JY o DESCRIPTION— The '43 is a high speed twos complement multiplier. The device is a 4-bit by 2-bit building block that can be connected in an iterative

single phase to three phase conversion circuit

Abstract: AD9954 digital count up and countdown timer using 8051 PSK modulation AD9953 AD9953YSV AD9953YSV-REEL7 radar modulator board
Contextual Info: 400 MSPS, 14-Bit, 1.8 V CMOS Direct Digital Synthesizer AD9953 FEATURES PLL REFCLK multiplier 4x to 20× Internal oscillator, can be driven by a single crystal Phase modulation capability Multichip synchronization 400 MSPS internal clock speed Integrated 14-bit DAC

AD9951 Application Notes

Abstract: AD9951YSV AD9951 AD9951YSV-REEL7 intel CORE i3 instruction set and design layout
Contextual Info: 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer AD9951 PLL REFCLK multiplier 4x to 20× Internal oscillator, can be driven by a single crystal Phase modulation capability Multichip synchronization FEATURES 400 MSPS internal clock speed Integrated 14-bit DAC

AD9951 Application Notes

Abstract: AD9951 AD9951YSV AD9951YSV-REEL7 c.d.m. technology cfr
Contextual Info: 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer AD9951 PLL REFCLK multiplier 4x to 20× Internal oscillator, can be driven by a single crystal Phase modulation capability Multichip synchronization FEATURES 400 MSPS internal clock speed Integrated 14-bit DAC

AD9953

Abstract: AD9953YSV
Contextual Info: 400 MSPS, 14-Bit, 1.8 V CMOS Direct Digital Synthesizer AD9953 PLL REFCLK multiplier 4x to 20× Internal oscillator, can be driven by a single crystal Phase modulation capability Multichip synchronization FEATURES 400 MSPS internal clock speed Integrated 14-bit DAC

AD9951

Abstract: AD9951YSV AD9951YSV-REEL7
Contextual Info: 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer AD9951 FEATURES PLL REFCLK multiplier 4x to 20× Internal oscillator, can be driven by a single crystal Phase modulation capability Multichip synchronization 400 MSPS internal clock speed Integrated 14-bit DAC

Contextual Info: 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer AD9951 FEATURES PLL REFCLK multiplier 4x to 20× Internal oscillator, can be driven by a single crystal Phase modulation capability Multichip synchronization 400 MSPS internal clock speed Integrated 14-bit DAC

AD9951

Abstract: AD9951 Application Notes AD9951YSV AD9951YSV-REEL7 cfr13
Contextual Info: 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer AD9951 FEATURES PLL REFCLK multiplier 4x to 20× Internal oscillator, can be driven by a single crystal Phase modulation capability Multichip synchronization 400 MSPS internal clock speed Integrated 14-bit DAC

AD9953

Abstract: AD9953YSV
Contextual Info: 400 MSPS, 14-Bit, 1.8 V CMOS Direct Digital Synthesizer AD9953 PLL REFCLK multiplier 4x to 20× Internal oscillator, can be driven by a single crystal Phase modulation capability Multichip synchronization FEATURES 400 MSPS internal clock speed Integrated 14-bit DAC

block diagram of 8 bit array multiplier

Abstract: 93S43 93S43DC 93S43DM 93S43FC 93S43FM 93S43PC
Contextual Info: 43 CO NNECTIO N DIAGRAM PINOUT A 93S43 q 4-BIT BY 2-BIT TWOS COMPLEMENT MULTIPLIER DESC R IPTIO N — The ’43 is a high speed twos com plem ent m ultiplier. The device is a 4-bit by 2-bit building block that can be connected in an iterative array to perform m ultiplication of tw o binary numbers of variable lengths. The

74S274

Abstract: 74ls275 74S275
Contextual Info: TY PES SN54LS275, SN 54S274. SN54S275. SN74LS275, SN74S274, SN74S275 4-BIT-BY-4-BIT BINARY MULTIPLIER WITH 3-STATE OUTPUTS 7-BIT-SLICE WALLACE TREES WITH 3-STATE OUTPUTS B U L L E T I N N O . D L -S 7 6 1 2 1 2 1 , O C T O B E R 1 9 7 6

74LS275

Abstract: 7B222 74S274 s276 74S275 74 LS 18 54LS275 3174S
Contextual Info: TYPES SNS4I'S275. SN54S274. SN54S275, SN74LS275, SN74S274, SH74SZ75 4-BIT-BY-4-Brr BINARY MULTiPLIER WITH 3-STATE OUTPUTS 7-BIT-SLICE WALLACE TREES WITH 3-STATE OUTPUTS B U L L E T I N H O . D L -8 7 9 1 1 1 2 1 , O C T O B E R 1978

PCI9056

Abstract: j6812 TD5 c320 mv silicon c320 FS110A DM9161 c160b DM9161 pcb RJ11 pcb board to cable connector inverter circuit 1K5 V3
Contextual Info: 5 4 3 2 +5V analog supply 32 bit 66MHz PCI bus Jn3 64 bit, not used LT101 9 +5V reference PCI_CLK source select & rate multiplier (x1 or x2) U17, U18 & U20 Clock buffer U19 S_CLK source select P8 RS232 #2 Local bus xtal clock generator Frequency measurement

half adder ic number

Abstract: ic number of half adder 74s558 of half subtractor ic 4 bit binary half adder IC half adder ic gould 1604 8x8 bit binary multiplier pin configuration for half adder S2316
Contextual Info: 8 x 8 High Speed Schottky M ultipliers Features/Benefits S N 74S 557 S N 5 4 /7 4 S 5 5 8 Ordering Information TEMPERATURE PART NUMBER PACKAGE 54S558 J, 44 , (L) Military 74S557, 74S558 N,J, Commercial • Industry-standard 8 x8 multiplier • Multiplies two 8-bit numbers; gives 16-bit result

S18A

Contextual Info: LOGIC D E V I C E S INC SfcsE D • SSbSIDS 0001253 4 ■ _ _ ;_ ;_ T - 9 S - LMU18 16 x 16-bit Parallel Multiplier DESCRIPTION □ 35 ns Worst-Case Multiply Time Q Low Power CMOS Technology