400FIA Search Results

Contextual Info: H I T A C H I / L O G I C / A R R A Y S / N E f l E O E D • 4 4 ^ 2 0 3 0 0 l 4 7 b S HN27C301P/FP Series- T -W -13- I S 131072-word x 8-bit CMOS One Time Electrically Programmable ROM The HN27C301P Series are 131072-word x 8-bit one time electrically programmable ROM. Initially, all bits of the

methanol

Abstract: OPTEK slotted OPB830L OPB832L OPB842L QPS830L kt840
Contextual Info: 27E D OP TE K T E C H N O L O G Y INC ^ a s a a o c m c n ii m OPTEK Product Bulletin OPB830 July 1989 Replaces January 1988 Slotted Optical Switches Types OPB830L, OPB840L Series •?6Q 6fiO ,240<sj0) M S (8 0 0 1 ,2 9 5 < 7 ,4 9 I ~— OPTICAL -7 SEE: NOTES

Microchip vk 1103

Contextual Info: fiW l e « « . 27LV128 M Ie r o o h Ip 128K 16K X 8 Low Voltage CMOS EPROM FEATURES DESCRIPTION • Wide voltage rang« 3.0V to 5.5V • High speed performance — 200ns Maximum access time at 3.0V • CMOS Technology for low power consumption — 8mA active current at 3.0V

Contextual Info: W D EDI5M32128C I ELECTRONIC DESIGNS IN C. High Performance Four Megabit EEPROM Module 128Kx32 CMOS ] l fl[ EEPROM Module Features The EDI5M32128C is a high speed, high perform­ ance, four megabit density EEPROM module organized as 128Kx32 bits. The module has four 128Kx8

UAA 1008

Contextual Info: CRTRLYST s e H i c o N o u c T o n 2231 CALLE DE LUNA SANTA CLARA, CA 9S0S4 Ttbphon»: 408 748-7700 Fax: (408) 980-8209 CAT28F512V5 512K (64K x 8) CMOS FLASH MEMORY DESCRIPTION FEATURES The CAT28F512V5 Rash memory is a high speed 64K x 8-bit electrically erasable and reprogram­

7480N

Abstract: FJH191 FJH191A H191A
Contextual Info: T.T.L. GATED FU LL ADDER FJHI9I FJHI9IA Corresponds to 74 Series type 7480N TEN TA TIV E DATA T h e s e d e v ic e s a r e t r a n s i s t o r - t r a n s i s t o r lo g ic b in a r y fu ll a d d e r s , w ith g a te d c o m p le ­ m e n ta r y in p u ts, c o m p le m e n ta ry su m m a tio n 2 a n d 2 o u tp u ts, a n d in v e r te d c a r r y

7402N

Abstract: 2 input nor gate 24v FJH221 nor gate 24v 7402N Nor 7402N TTL FJH221A
Contextual Info: T.T.L. Q U A D RU PLE 2-INPUT POSITIVE NOR G ATES FIH 22I FJH 22IA Corresponds to 74 Series type 7402N T E N T A T IV E D A T A T hese dev ices a re tr a n s is to r - tr a n s is to r logic quadruple 2-input p o sitiv e NOR gates in the F J s e r ie s of in te g rate d c ir c u its . The FJH221 c o rre sp o n d s to '74 S e rie s ' type

7400N

Abstract: 7401N 7402N 7403AN 7403N 7404N 7405AN 7405N 7420N 7440N
Contextual Info: INTEGRATED CIRCUITS LIST OF COMPARABLE TYPES T T L RANGE COMMERCIAL VERSIONS Type No. 7400N 7401N 7401 AN 7402N 7403N 7403AN 7404N 7405N 7405AN 741 ON 7420N 7430N 7440N 7441 AN 7442N 7450N 7451N 7453N Mullard types Type No. Mullard types FJH131 FJH231 FJH311

Contextual Info: IBM0165805B IBM0165805P ADVANCED 8M x 8 12/11 E D O D R A M Features • 8,388,608 word by 8 bit organization Read-Modity-Write • Single 3.3 ± 0.3V power supply Performance: • Extended Data Out Hyper Page Mode CAS before RAS Refresh - 4096 cycles/Retention Time

7170

Contextual Info: ICM7170 jaP-Compatible Real-Time Clock GENERAL DESCRIPTION FEATURES The ICM7170 real time clock is a microprocessor bus compatible peripheral, fabricated using Harris’ silicon gate CMOS LSI process. An 8 -bit bidirectional bus is used for the data I/O circuitry. The clock is set or read by accessing the

Contextual Info: DS3862 National Semiconductor DS3862 Octal High Speed Trapezoidal Bus Transceiver G eneral Description Features The DS3862 is an octal high speed schottky bus transceiver intended for use with terminated 120il impedance lines. It is specifically designed to reduce noise in unbalanced trans­

2BC64

Contextual Info: 28C64A & DICE FORM M ic r o c h ip 64K 8K x 8 CMOS Electrically Erasable PROM D IE C O N F IG U R A TIO N FEATURES Die Size: 134 x 206 sq. mils n (O w Tf n Q § Q O 9 | • 250ns Access Time • CMOS Technology for Low Power Dissipation cm T- o — 30m A Active

ML4041CQ

Abstract: ML4042 BVP-2
Contextual Info: % Micro Unear ML4041, ML4042 Read Data Processor GENERAL DESCRIPTION FEATURES The ML4041, ML4042 is a monolithic bipolar integrated circuit used in disk drive systems to detect amplitude peaks generated by the recording heads during a Read operation. Connected to the read/write amplifier

SCN2681

Abstract: SCN2681T SCN2681TC1A44 SCN2681TC1N40
Contextual Info: INTEGRATED CIRCUITS SCN2681T Dual asynchronous receiver/transmitter DUART Product specification 1995 May 1 IC19 Philips Semiconductors PHILIPS PHILIPS 711002b 0 G CJ0E7C} 32b This Material Copyrighted By Its Respective Manufacturer Philips Semiconductors

55T500

Abstract: IMP55T500 wd preamp
Contextual Info: IMP55T500/502 m rA 5V SINGLE-CHIP READ CHANNEL with PREAMP/WRTTE DRIVER for TAPE DRIVES User Manual 405042^ 00021fl0 1Tb Advanced Product Information IM P 1994,1995 S5-121MC 3-31-95 Page 1 of 42 5V SINGLE-CHIP READ CHANNEL with PREAMP/WRITE DRIVER IMP55T500/502

GQCC1-J68

Abstract: 87c451 80C51 83C451 87C51 AVR* "add immediate" TLO 81
Contextual Info: Philips S em ico n d uctors M ilitary M icrop ro cesso r P roducts P ro du ct specifica tio n CMOS single-chip 8-bit EPROM microcontroller FEATURES 87C451 ORDERING INFORMATION • User-programmable microcontroller ORDER CODE PKG DESIGNATION* 68-Pin J Bend QFP

D0035

Contextual Info: XL93LC46B 1,024-Bit Serial Electrically Erasable PROM 1.8V to 5 .5 V Operation FEATURES • 1,8V to 5.5V Operation • Extended Temperature Range: -40°C to +85 C • User Selectable Word Length • State-of-the-Art Architecture PIN CONFIGURATIONS Plastic Dual-in-line

Contextual Info: DPE6434 64K X 32 CMOS EEPROM MODULE DESCRIPTION: The DPE6434 is a high-performance Electrically Erasable and Programmable Read O nly M emory EEPRO M module and may be organized as 64K X 32, 128K X 16 or 256K X 8. The module is built with eight low-power C M O S 32K X 8

KM23C2001

Abstract: mask rom mask rom 2m 23C2001
Contextual Info: KM23C2001 G CMOS MASK ROM 2M-Bit (256K x 8) CMOS MASK ROM GENERAL DESCRIPTION FEATURES • • • • • • • • 262,144 x 8 bit organization Fast access time: 150ns (max.) Supply voltage: single + SV Current consumption Operating: 50mA (max.) Fully static operation

M29W8000

Contextual Info: Preliminary KM29W8000T, KM29W8000IT FLASH MEMORY Document Title 1M X 8 bit NAND Flash Memory Revision History Revision NPr History 0.0 1.0 Data Sheet 1997 Data Sheet 1998 1. Changed tBERS param eter: 5ms Typ. -> 2ms(Typ.) 10ms(Max.) -> 4ms(Max.) 2. Changed tPRO G param eter: 1,5ms(Max.) -> 1 Oms(Max)

KM23C512

Contextual Info: KM23C512 G CMOS MASK ROM 512K-Bit (64Kx8) CMOS MASK ROM FEATURES GENERAL DESCRIPTION • KM23C512: 28 pln DIP (Polarity programmable chip enable pin and output enable pin) • KM23C512G: 32-pln SOP (Polarity programmable chip enable pin and output enable pin)

F-91300

Abstract: 9010 eprom f91300
Contextual Info: fiW l e « « . 27LV128 MIeroohIp 128K 16K X8 Low Voltage CMOS EPROM FEATURES DESCRIPTION • Wide voltage rang« 3.0V to 5.5V • High speed performance —200ns Maximum access time at 3.0V • CMOS Technology for low power consumption — 8mA active current at 3.0V

receiver philips fr 310

Abstract: RIA 250
Contextual Info: Philips Semiconductors Data Communications Products Product specification Dual universal serial communications controller DUSCC DESCRIPTION SCN26562 • Parity and FCS (fram e check sequence LR C or CRC) generation The Philips Sem iconductors SC N26562 Dual Universal Serial

T74LS139B1

Contextual Info: S G S-THOHSON 07E D I v ie 'id d v u ujihU 7j y LOW POWER SCHOTTKY INTEGRATED CIRCUITS - 67C 16200 T -6 6 -2 1 -5 5 DUAL 1-0F-4 DECODER DESCRIPTION The T54LS139/T74LS 139 is a high speed Dual 1-of-4 Decoder/Demultiplexer. This device has two