462BL7B Search Results

8251 microprocessor block diagram

Abstract: I8251A features of 8251 microprocessor intel 8085 minimal system intel 8251 USART control word format 8251a intel PLD 8251A programmable communication interface 8251 processor intel 8251 USART
Contextual Info: INTEL CORP MEMORY/PL] / 462bl7b DG7fi7D7 324 • ITL2 SbE » intJ. 8251A PROGRAMMABLE COMMUNICATION INTERFACE ■ Synchronous and Asynchronous Operation Asynchronous Baud Rate— DC to 19.2K Baud ■ Synchronous 5 -8 Bit Characters; Internal or External Character

M28F020-20

Abstract: MD28F020-20/B
Contextual Info: in te l ß o n iy ß iß O A O tfr M28F020 2048K 256K x 8 CMOS FLASH MEMORY Flash Electrical Chip-Erase — 5 Second Typical Chip-Erase Quick-Pulse Programming Algorithm — 10 jus Typical Byte-Program — 4 Second Typical Chip-Program 10,000 Erase/Program Cycles Minimum

00A75

Abstract: INTEL Core i7 860 J 80222 lm 6358 J1 3009-2 271121 Texture mapping CC1105 Intel i860
Contextual Info: P K H IL D fiflD M M V MILITARY i860 XR 32/64-BIT MICROPROCESSOR • Parallel Architecture that Supports Up to Three Operations per Clock — One Integer or Control Instruction per Clock — Up to Two Floating-Point Results per Clock ■ High Performance Design

Contextual Info: in te i M8274 MULTI-PROTOCOL SERIAL CONTROLLER MPSC Military Asynchronous, Byte Synchronous and Bit Synchronous Operation Two Independent Full Duplex Transmitters and Receivers Fully Compatible with M8048, M8051, M8085, M8088, M8086, and M80186 CPU’s; and the M8089 I/O Processor

290139

Contextual Info: INTEL CÔRP In te l MEMORY/LOGIC EOE D • M ñ 5 b l 7 b O □h b 7 b^ h 68C257 256K (32K x 8) CHMOS UV ERASABLE PROM ■ 6801,6803, 68HC11 Microcomputer Compatible — Integrated Address Latch — Active-High Chip Enable -Active-High Output Enable ■ Low Power CHMOS'II-E

Contextual Info: M82510 ASYNCHRONOUS SERIAL CONTROLLER Military • MCS -51 9-Bit Protocol Support ■ ■ Control Character Recognition ■ Asynchronous Operation — 5- to 9-Bit Character Format — Baud Rate DC to 288k — Complete Error Detection ■ CHMOS III with Power Down Mode

Contextual Info: In te l MILITARY Intel386 HIGH PERFORMANCE 32-BIT MICROPROCESSOR WITH INTEGRATED MEMORY MANAGEMENT • Flexible 32-Bit Microprocessor — 8, 16, 32-Bit Data Types — 8 General Purpose 32-Bit Registers ■ Very Large Address Space — 4 Gigabyte Physical

MDPLD910-20

Contextual Info: A P M Ä N K D ü O M F [^ [M A T rO ® M in t e i MILITARY ÌPLD910 24-MACROCELL CHMOS jaPLD Function, Pin, and JEDEC Compatible with M5C090, EP900, EP910 and EP930 • Extensive Software and Programming Support via Intel and Third-Party Tools tpo 20 ns, 40 MHz w/Feedback, Clock

N89C026FT

Abstract: Intel 80c196 Packaging Information 89C024LT 80C196 users manual intel PLD N89C026 89027
Contextual Info: INTEL in tj • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ CORP FIEMOR Y / P L D / bflE D ■ 4fl2bl7b DGfiSG3S 89C024FT V.42/42bis MODEM CHIP SET CHMOS for Low Operating Power Low Standby Power Minimum Chip Count for Small Size V.42 Compliant Error Correction

Contextual Info: ¡ n + | P K @ [ß y T [F IH IV O E W 87C196JT ADVANCED 16-BIT CHMOS MICROCONTROLLER Automotive —40°C to + 125°C Ambient High Perform ance CHMOS 16-Bit CPU High Speed Peripheral Transaction Server PTS) 32 Kbytes o f On-Chip EPROM Tw o 16-Bit Softw are Timers

24V10

Abstract: intel 27131 intel PLD AP396
Contextual Info: in te i MILITARY ¡FX8160 FLEXIogic FPGA WITH SRAM OPTION High Performance FPGA Field Programmable Gate Array — Deterministic 12 ns Pin-to-Pin Propagation Delays — 66 MHz System Clock Frequency 160 Complex Macrocells (7,000 Maximum Logic Gates) or up to

I28F400

Abstract: 80L188EB 82360SL intel PLD D773
Contextual Info: A D V A N C E IN F O R M A T IO N in te i INTEL CORP MEMORY/PLD/ SbE » • 4fl2bl7b Da773Sa TßH ■ I T L E 28F400BX-TL/BL, 28F004BX-TL/BL - T qt (3> 2 6 4MBIT (256K x16, 512K x8 LOW POWER BOOT BLOCK FLASH MEMORY FAMILY I Low Voltage Operation for Very Low

Contextual Info: A E M Ä l i f l ! OM F@l^[M/ÄTrD@M in te i M80C186EB-16, -13, -8 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR • Full Static Operation • True CMOS Inputs and Outputs • -55°C to + 125°C Operating Temperature Range Integrated Feature Set — Low-Power Static CPU Core

28F400BX-B

Abstract: 28F400BX-T 28F004BX-B 28F004BX-T intel PLD PA28F400BX
Contextual Info: INTEL CORP HENORY/PLD/ SbE D 4fl5bl7L, 007fc.44D 0 2 e! • i ITL2 D K lF O l^ lîü l T rO O M in te l 28F400BX-T/B, 28F004BX-T/B 4 MBIT (256K x16, 512K x8 BOOT BLOCK FLASH MEMORY FAMILY Very High-Performance Read — 60/80 ns Maximum Access Time — 30/40 ns Maximum Output Enable

Intel 1103 DRAM

Abstract: 16bit isa pcmcia TPE TES A 210 E 82595 LSE B3 transformer how to test 8023 dram cont ic A82595 transformer PLT ISA Design PCMCIA Design
Contextual Info: INTEL CORP MEinORY/PLD/ bêE D • MflEblVb □Gfl4GlH in t e l 82595 ISA/PCM CIA HIGH INTEGRATION ETHERNET CONTROLLER Optimal Integration for Lowest Cost Solution — Glueless 8-Bit/16-Bit ISA/PCMCIA 2.0 Bus Interface — Provides Fully 802.3 Compliant AUI

D28F512-120P1C4

Abstract: d28f512 N28F512-120P1C4 28F512-150P1C4 N28F512-150P1C4 N28F512-200P1C4 29020 N28F512-200
Contextual Info: INTE L CORP intel • M EM OR Y/ LO GI C SOE D ■ H&2bl 7h Q0b72fl2 S ■ V -^ -/5 -2 7 28F512 512K (64K x 8) CMOS FLASH MEMORY Flash Electrical Chip-Erase — 1 Second Typical Chip-Erase ■ Quick-Pulse Programming Algorithm — 10 iia Typical Byte-Program