4FL2BL75 Search Results

INTEL Packaging Handbook

Abstract: 80C196MC N87C196 G1314 intel packaging handbook 240800 -20/intel packaging handbook 240800 V/intel packaging handbook 240800
Contextual Info: INTEL CORP UP/PRPHLS bôE D • 4fl2bl75 G 1 3 m ? l 515 ■ ITL1 PDBm LG W AG ^ in te l 8XC196MC INDUSTRIAL MOTOR CONTROL MICROCONTROLLER 87C196MC 16 Kbytes of On-Chip OTPROM* 83C196MC 16 Kbytes of On-Chip ROM High Performance CHMOS 16-Bit CPU 16 Kbytes of On-Chip OTPROM/ROM

difference between intel 8086 and intel 80186 pro

Abstract: 44e 402
Contextual Info: INTEL CORP U P/ PR PH LS 44E D Bl 4fl2bl75 G104êG3 4 Q I T L 1 in1U. 80186 HIGH INTEGRATION 16-BIT MICROPROCESSOR • Integrated Feature Set — Enhanced 8086-2 CPU — Clock Generator — 2 Independent DMA Channels — Programmable Interrupt Controller

m51257

Abstract: M51257L M5125 271113 M51257-L
Contextual Info: INTEL CORP UP/PRPHLS 2DE 4fl2bl75 OOfilTST 0 • intel '. T ^ Z 3 '0 b M51257/M51257L HIGH SPEED 256K x 1-BIT CM OS STATIC RAM Standard Military Drawings #5962-88725and5962-88544* ■ Battery Back-Up Operation — 2V Data Retention (M51257L Versions) ■ Single 5V (±10% ) Power Supply

RD 24105 RP

Abstract: difference between intel 8086 and intel 80186 pro i80C186 80C186-16 Intel 80C186 8088 opcode sheet LS160 80C166 270354 270500
Contextual Info: SbE D i n t e l , in t e l • c o r p 4fl2bl75 Q117TS4 bTfi ■ ITL1 < ^ / p R p H i- s > - T - M < i- n - is 80C186 CHMOS HIGH INTEGRATION 16-BIT MICROPROCESSOR Operation Modes Include: — Enhanced Mode Which Has — DRAM Refresh Control Unit — Power-Save Mode

MD80C31

Abstract: MD80C31BH M80C31 MT80C31 MR80C31 MZ80 MR80C31BH d1244 MT80C31BH g1244
Contextual Info: SÔE ]> intei • 4fl2bl75 012443=5 TT3 « I T L l INTEL CORP UP/PRPHLS F w -w M80C51BH/M80C31BH CMOS SINGLE-CHIP 8-BIT MICROCOMPUTER .0 7 Military M80C31BH—Control Oriented CPU with RAM and I/O 64K Program Memory Space M80C51BH—An M80C31BH with Factory Mask-Programmable ROM

82750PB

Contextual Info: INTEL CORP UP/PRPHLS bfiE ]> • 4fl2bl75 DlS'iSflD 03^ A E M Ä M ! O K H F © K G ilÄ ¥ D M 82750PD VIDEO PROCESSOR ■ High Performance Video Processor Based on the 82750PB ■ Supports the Shared Frame Buffer Architecture — Integration of Graphics and Video

8096 pin diagram

Abstract: intel 8097 microcontroller 8096 timer 0 delay at 12 mhz intel 8097 MCS-96 architecture overview 16 bit 8096 microcontroller architecture 8096 MICROCONTROLLER ADDRESSING MODES 8097-90 watchdog timer intel 8096 16 bit 8096 microcontroller interrupt
Contextual Info: INTEL CORP UP/PRPHLS 12ED I 4fl2bl75 00bô714 T J| P R S O M M R V T ' V 9 -1 9 -1 6 "19 MCS -96 809X-90,839X-90 • Pulse-Width Modulated Output ■ 839X: an 809X with 8 Kbytes of OnChip ROM ■ 232 Byte Register File ■ High Speed Pulse I/O ■ Memory-to-Memory Architecture

Contextual Info: in te l 28F020 2048K 256K x 8 CMOS FLASH MEMORY Flash Electrical Chip-Erase — 2 Second Typical Chip-Erase Quick-Pulse Programming Algorithm — 10 jas Typical Byte-Program — 4 Second Chip-Program 100,000 Erase/Program Cycles 12.0V ± 5 % Vpp High-Performance Read

Contextual Info: ^ EXUKDTT [PIRilMlG inte* 87C196KT/87C196KS 20 MHz ADVANCED 16-BIT CHMOS MICROCONTROLLER Automotive —40°C to + 125°C Ambient High Performance CHMOS 16-Bit CPU Up to 32 Kbytes of On-Chip EPROM Up to 1 Kbyte of On-Chip Register RAM Up to 512 Bytes of Additional RAM

Contextual Info: inU 8XC196KT COMMERCIAL CHMOS MICROCONTROLLER • High Performance CHMOS 16-Bit CPU ■ Oscillator Fail Detection Circuitry ■ Up to 32 Kbytes of On-Chip EPROM ■ Up to 1 Kbyte of On-Chip Register RAM ■ High Speed Peripheral Transaction Server PTS ■ Up to 512 Bytes of Additional RAM

Contextual Info: in te l 28F016XS 16-MBIT 1 MBIT x 16, 2 MBIT x 8 SYNCHRONOUS FLASH MEMORY Effective Zero Wait-State Performance up to 33 MHz — Synchronous Pipelined Reads Backwards-Compatible with 28F008SA Command-Set SmartVoltage Technology — User-Selectable 3.3V or 5V Vqc

m8087 intel

Contextual Info: p R iy iM O B y w in te i M80C187 80-BIT NUMERIC PROCESSOR EXTENSION Military High Perform ance 80-Bit Internal Architecture Tw o to Three Tim es M8087 Perform ance at Equivalent Clock Speed Im plements A N S I/IE E E Standard 7541985 fo r Binary Floating-Point

Contextual Info: I P ^ iU ö Ä Ä f in te i 28F008SA 8-MBIT 1-MBIT x 8 F la s h F ile T M MEMORY Extended Temperature Specifications Included High-Density Symmetrically Blocked Architecture — Sixteen 64-Kbyte Blocks Very High-Performance Read — 85 ns Maximum Access Time

Contextual Info: in te i ADVANCE INFORMATION 28F016XS 16-MBIT 1 MBIT x 16, 2 MBIT x 8 SYNCHRONOUS FLASH MEMORY • Effective Zero Wait-State Performance up to 33 MHz — Synchronous Pipelined Reads ■ SmartVoltage Technology — User-Selectable 3.3V or 5V V cc — User-Selectable 5V or 12V Vpp

Contextual Info: intJ. 2-MBIT 128K x 16, 256K x 8 LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY 28F200BL-T/B, 28F002BL-T/B m Low Voltage Operation for Very Low Power Portable Applications — Vcc = 3.0V-3.6 V • Automatic Power Savings Feature — 0.8 mA Typical Ice Active Current in

Contextual Info: 28F256A 256K 32K x 8 CMOS FLASH MEMORY • Flash Electrical Chip-Erase — 1 Second Typical Chip-Erase ■ Quick-Pulse Programming Algorithm — 10 fis Typical Byte-Program — 0.5 Second Chip-Program ■ 100,000 Erase/Program Cycles ■ 12.0V ± 5 % Vpp

Contextual Info: in te i 87C196KT/87C196KS ADVANCED 16-BIT CHMOS MICROCONTROLLER Automotive —40°C to + 125°C Ambient High Performance CHMOS 16-Bit CPU Up to 32 Kbytes of On-Chip EPROM High Speed Peripheral Transaction Server (PTS) Up to 1 Kbyte of On-Chip Register RAM

Contextual Info: in tj, 8XC196KC/8XC196KC20 COMMERCIAL/EXPRESS CHMOS MICROCONTROLLER 87C196KC—16 Kbytes of On-Chip OTPROM 83C196KC—16 Kbytes ROM 80C196KC—ROMIess • 16 and 20 MHz Available ■ Dynamically Configurable 8-Bit or 16-Bit Buswidth ■ 488 Byte Register RAM

Contextual Info: INTEL CORP UP/PRPHLS bflE D • MfiBbl7S 16b in t e * 87C51 /80C51BH/80C31BH CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER Commercial/Express 87C 51/80C 51B H /80C 51B H P /80C 31B H *S ee Table 1 fo r Proliferation Options High Perform ance CHMOS EPROM 5 Interrupt Sources

Contextual Info: in tj 2-MBIT 128K x 16, 256K x 8 BOOT BLOCK FLASH MEMORY FAMILY 28F200BX-T/B, 28F002BX-T/B • x8/x16 Input/Output Architecture — 28F200BX-T, 28F200BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs ■ x8-only Input/Output Architecture

Contextual Info: intJ 82078 64 PIN CHMOS SINGLE-CHIP FLOPPY DISK CONTROLLER — Selectable Boot Drive — Standard IBM and ISO Format Features — Format with Write Command for High Performance in Mass Floppy Duplication • Small Footprint and Low Height Packages ■ Supports Standard 5.0V as well as Low

Contextual Info: 80960RP 1.0 1.2 ABOUT THIS DOCUMENT Terminology In this document, the following terms are used: This data sheet contains ADVANCE INFORMATION about Intel’s i960 RP processor, including a func­ tional overview, mechanical data package signal locations and simulated thermal characteristics ,

51FFH

Contextual Info: in te i 82092AA PCI TO PCMCIA/ENHANCED-IDE CONTROLLER • Provides the Ultimate Plug and Play Solution fo r High Perform ance PCI Desktop Systems — Supports Combinations of PCMCIA and Enhanced Local Bus IDE Interfaces — Contains a 32-bit PCI Local Bus

Contextual Info: [PIM2>[E U T P^E^OO in te i 80960HA/HD/HT 32-BIT HIGH-PERFORMANCE SUPERSCALAR PROCESSOR • Binary Compatible with Other80960 Processors • Two Instructions/Clock Sustained Execution 32-Bit Parallel Architecture — Load/Store Architecture — Sixteen 32-Bit Global Registers