576WORD Search Results

MSM531602C

Abstract: O443 C738
Contextual Info: O K I Semiconductor MSM531602C 1 ,048,576-W ord x 16-B it o r 2,097,152-W o rd x 8-B it M ask ROM DESCRIPTION The OKI MSM531602C is a high-speed CMOS Mask ROM that can electrically switch between 1 048 576word x 16-bit or 2,097,152-word x 8-bit configurations. The MSM531602 operates on a single 5.0 V power

TM124EAD9C

Abstract: TM124EAD9B-6
Contextual Info: TM124EAD9B, TM124EAD9C 1 048 576-WORD BY 9-BIT DYNAMIC RANDOM-ACCESS MEMORY MODULES SMMS191 — JANUARY 1991 This Data Sheet is Applicable to A ll TM124EAD9BS and TM124EAD9CS Symbolized with Revision "B" and Subsequent Revisions as Described on Page 6-44.

TMS44410

Abstract: TMS44410-70
Contextual Info: TMS44410 1 048 576-WORD BY 4-BIT WRITE-PER-BIT DYNAMIC RANDOM-ACCESS MEMORY REV A - • Organization . . . 1 048 576 x 4 SMHS441 JANUARY 1991 DM and DJ Packaget Top View • Single 5-V Power Supply (±10% Tolerance) • Performance Ranges: ACCESS ACCESS ACCESS

Contextual Info: TMS416160, TMS416160P 1 048 576-WORD BY 16-BIT HIGH-SPEED DYNAMIC RANDOM-ACCESS MEMORIES SMKS660-DECEMBER 1992 Organization. . . 1 048 576 x 16 RE P A C K A G E t DC P A C K AG E t TOP VIEW (TOP VIEW) Single 5-V Supply (10% Tolerance) '416160/P-60 '416160/P-70

TS-2321

Contextual Info: SMJ44400 1 048 576-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY SGMS041D - JANUARY 1991 - REVISED JUNE 1995 Processed to MIL-STD-883, Class B Organization. . . 1 048 576 x 4 Single 5-V Power Supply ±10% Tolerance Performance Ranges: A CCESS ACCESS A CCESS

TMS44400

Abstract: TMS44400-10
Contextual Info: TMS44400 1 048 576-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY R E V A — S M H S 4 4 0 B — O C T O B E R 1 9 8 9 — R E V IS E D J A N U A R Y 1991 DM AND DJ P acka ge st Top View This Data Sheet Is Applicable to A ll TMS44400s Symbolized With Revision “B" and Subsequent

TMS626812

Contextual Info: TMS626812 1048576-WORD BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY _ SMOS687A -JULY 1 9 9 6- REVISED APRIL 1997 • • • Organization . . . 1M x 8 x 2 Banks 3.3-V Power Supply ± 10% Tolerance Two Banks for On-Chip Interleaving

Contextual Info: PRELIMINARY DATA SHEET NEC MOS INTEGRATED CIRCUIT M PD4516421,4516821,4516161 16M bit Synchronous DRAM Description The UPD4516421, UPD4516821, uPD 4516161 are high-speed 16 777 2 1 6-bit synchronous dynamic random-access memories, each organized as 2 097 152-word x

Contextual Info: MITSUBISHI LSIs M 5M 54R 01J-12,-15 1997.11.20 Rev.F 4 1 9 4 3 0 4 -B IT 4 1 9 4 3 0 4 -W O R D BY 1 -B IT C M O S S T A T IC RAM DESCRIPTIO N The M 5M 54R01J is a family of 4194304-word by 1-bit static PIN C O N FIG U R A TIO N (TO P V IE W ) RAMs, fabricated with the high performance CM OS silicon gate

424400LA-70

Contextual Info: NEC MOS INTEGRATED CIRCUIT ¿¿PD42S4400L, 424400L 3.3 V OPERATION 4 M-BIT DYNAMIC RAM 1 M-WORD BY 4-BIT, FAST PAGE MODE Description The /xPD42S4400L, 424400L are 1 048 576 words by 4 bits dynamic C M O S RAMs. The fast page mode capability realize high speed access and low power consumption.

nec A2C

Contextual Info: MOS INTEGRATED CIRCUIT ju P D 4 2 S 1 6 1 6 5 L , 4 2 1 6 1 6 5 L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, HYPER PAGE MODE, BYTE READ/WRITE MODE Description The|iPD42S16165L, 4216165Lare 1 048 576 w ords by 16 bits dynamic CMOS RAMs w ith optional hyper page

NEC uPD 688

Abstract: CQ-111
Contextual Info: PRELIMINARY DATA SHEET NEC MOS INTEGRATED CIRCUIT /i PD4516421,4516821,4516161 16M bit Synchronous DRAM Description The UPD4516421, UPD4516821, uPD 4516161 are high-speed 16 777 216-bit synchronous dynamic random-access memories, each organized as 2 097 152-word x

NEC 4216160

Contextual Info: MOS INTEGRATED CIRCUIT f iPD42S16160,4216160,42S18160,4218160 16 M -BIT DYNAM IC RAM 1 M -W ORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE DESCRIPTION The mPD42S16160, 4216160, 42S18160, 4218160 are 1 048 576 words by 16 bits dynamic CMOS RAMs. These differ in refresh cycle and the /iPD42S16160, 42S18160 can execute CAS before RAS self refresh (see

SMJ44400

Contextual Info: SMJ44400 1 048 576-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY SGMS041D – JANUARY 1991 – REVISED JUNE 1995 D D D D D D D D D D D D D Processed to MIL-STD-883, Class B Organization . . . 1 048 576 x 4 Single 5-V Power Supply ±10% Tolerance Performance Ranges:

Contextual Info: TMS428160, TMS428160P 1 048 576-WORD BY 16-BIT HIGH-SPEED LOW VOLTAGE DYNAMIC RANDOM-ACCESS MEMORIES Organization . . . 1 048 576 x 16 DC PACKAGET TOP VIEW (TOP VIEW) Single 3.3-V Supply (±0.3V Tolerance) Performance Ranges: '428160/P-70 '428160/P-80 ACCESS ACCESS ACCESS READ OR

Contextual Info: TMS46400, TMS46400P 1 048 576-WORD BY 4-BIT LOW-VOLTAGE DYNAMIC RANDOM-ACCESS MEMORIES SMHS464-JANUARY 1993 SD PACKAGEt TOP VIEW DJ PACKAGEt (TOP VIEW) Single 3.3-V Power Supply (±0.3-V Tolerance) DQ1 C Low Power Dissipation (TMS46400P) - 200 mA CMOS Standby

Contextual Info: SMJ44400 1 048 576-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY S G M S 0 4 1 B -JA N U A R Y 19 9 1 -R E V IS E D JULY 1991 JD A N D HR P A C K A G E S t TOP VIEW Processed to MIL-STD-883, Class B Military Temperature Range . . . - 5 5 to 125°C C 1 C 2 w C3

pjuaa

Abstract: 1993 SDRAM 7216B
Contextual Info: 16 777 216 BIT SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY S M 0 S6 82-J A N U A R Y 1993 DGE PACKAG ET TOP VIEW Organization. . . 1M x 8 x 2 Banks 3.3 V-Power Supply (10% Tolerance) Two Banks For On-Chip Interleaving (Gapless Accesses) * High Bandwidth - Up to 100-MHz Data

MSM538002C

Abstract: SM535
Contextual Info: O K I Semiconductor MSM538002C r 524,288-Word x 16-Bit or 1,048,576-Word x 8-Bit Mask ROM ~~ ~ D E S C R IP TIO N The OKI MSM538002C is a high-speed CMOS Mask ROM that can electrically switch between 524 288word x 16-bit and 1,048 576-word x 8-bit configurations. The MSM538002C operates o n X * 5 0 V

Contextual Info: NEC MOS INTEGRATED CIRCUIT juPD42S4400L, 424400L 3.3 V OPERATION 4 M BIT DYNAMIC RAM 1 M-WORD BY 4-BIT, FAST PAGE MODE Description The /¿PD42S4400L, 424400L are 1 048 576 w ords by 4 bits dynam ic CMOS RAMs. The fast page mode capability realize high speed access and low power consumption.

Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT /¿PD424400 4M-BIT DYNAMIC RAM 1 M-WORD BY 4-BIT, FAST PAGE MODE Description The ftP 0424400 is a 1 048 576 words by 4 bits dynamic CMOS RAM. The fast page mode capability realize high speed access and low power consumption.

TM124GU8A

Abstract: CI 576 TM124GU8A-60 TM124GU8A-70 TM124GU8A-80 TMS44400
Contextual Info: TM124GU8A 1 048 576-WORD BY 8-BIT DYNAMIC RANDOM-ACCESS MEMORY MODULE SMMS181A–JANUARY 1991–REVISED JANUARY 1993 • • • • • • • • Organization . . . 1 048 576 x 8 Single 5-V Power Supply ±10% Tolerance 30-Pin Single In-Line Memory Module

ao21

Contextual Info: MITSUBISHI LSIs M 5 M 5 4 R 0 1 J - 1 2 ,- 1 5 1997.11.20 Rev.F 4194304-BIT 4194304-WQRD BY 1-BIT CMOS STATIC RAM DESCRIPTION The M5M54R01J is a fam ily of 4194304-w ord by 1-bit static PIN CONFIGURATION (TOP VIEW) RAMs, fabricated with the high performance CMOS silicon gate

WOLA reference

Abstract: matched filter matlab codes wola 0W344-004-XTP 0W344-005-XTP 0W588-002-XUA circuit diagram of rc transmitter and receiver schematic diagram bluetooth dongle CSP Bluetooth Development Kit
Contextual Info: BelaSigna 200 1.0 General Description BelaSigna 200 is a high-performance, programmable, mixed-signal digital signal processor DSP that is based on ON Semiconductor’s patented second-generation SignaKlara technology. This single-chip solution is ideally suited for embedded applications where audio performance, low power consumption and