5L25 Search Results

KL SN 102 94v

Abstract: wire T568 SCV64 The VMEbus Handbook, Fourth Ed VMEbus interface handbook Q002 ih 584 el designer manual kds 1555 SAA 1260 Ka 2535
Contextual Info: O p e n b u s In t e r fa c e C o m p o n e n t s SCV64 User Manual Issue 1 * / • bSflfllDl Q[ D24A0 134 ■ This Material Copyrighted By Its Respective Manufacturer T h e in fo rm a tio n in th is d o c u m e n t is su b je c t to c h a n g e w ith o u t n o tic e an d sh o u ld n o t be c o n stru ed as a

Contextual Info: Pre-Production 5L256B 256Kb FRAM Serial 3V Memory Features 256K bit Ferroelectric Nonvolatile RAM • Organized as 32,768 x 8 bits • Unlimited Read/Write Cycles • 10 Year Data Retention • NoDelay Writes • Advanced High-Reliability Ferroelectric Process

CA 5668

Abstract: 5L25 A12L A13L
Contextual Info: HIGH-SPEED 2.5V 16/8K x 8 DUAL-PORT STATIC RAM Features PRELIMINARY IDT70T06/5L u M/S = VIH for BUSY output flag on Master M/S = VIL for BUSY input on Slave u Interrupt Flag u On-chip port arbitration logic u Full on-chip hardware support of semaphore signaling

L1220

Abstract: 5L25 A12L A13L IDT70T15
Contextual Info: HIGH-SPEED 2.5V 16/8K X 9 DUAL-PORT STATIC RAM Features ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Commercial:20/25ns max. – Industrial: 25ns (max.) Low-power operation – IDT70T16/5L

Contextual Info: Customer Information Sheet SHEET 2 OF 2 1 DRAWING No. IF IN DOUBT - ASK | | NOT TO SCALE ALL DI M E N S E S SM | No. CONTACTS DIM 'A' DIM 'B' M 80 -5L206M5 6 4.00 1 1.00 M 80 -5L2I0M5 10 14 8.00 15.00 M 80 -5L2I4M5 12.00 19.00 M 80 -5L220M5 20 18.00 25.

CA 5668

Contextual Info: HIGH-SPEED 2.5V 16/8K x 8 DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Commercial: 20/25ns max. – Industrial: 25ns (max.) Low-power operation

Contextual Info: CMOS SyncBiFIFO 2 5 6 x 1 8 x 2 and 5 1 2 x 1 8 x 2 p o w e r b id ire ctio n a l F irst-In. F irst-O u t F IF O m e m o rie s, w ith syn ch ro n o u s in te rfa ce fo r fa st read a n d w rite c ycle tim e s. T h e S y n c B iF IF O IM is a da ta b u ffe r th a t can sto re o r re trieve

Contextual Info: HIGH-SPEED 2.5V 16/8K X 9 DUAL-PORT STATIC RAM IDT70T16/5L OBSOLETE PARTS Features ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Commercial:20/25ns max. – Industrial: 25ns (max.)

80C88A-10

Abstract: M80C88A-2 M82C51A-2 M82C53-2 80C85AH
Contextual Info: E200011-27-X2 O K I Semiconductor MSM80C88A-10R S /G S /JS Previous version: Aug. 1996 8-Bit C M O S M IC R O P R O C E S S O R G E N E R A L D E S C R IP T IO N The M SM 80C88A-10 is internal 16-bit CPUs w ith 8 -bit interface im plem ented in Silicon Gate

iC-lg

Abstract: MSM80C86A-10RS -7 80C85AH
Contextual Info: O K I Semiconductor MSM80C86A-1ORS/GS/JS 16-Bit C M O S M ICROPROCESSOR G E N E R A L D ESCR IPTIO N The MSM80C86A-10is com plete 16-bit CPUs im plem ented in Silicon Gate CMOS technology. They are designed w ith sam e processing speed as the NM OS 8086-1 b u t have considerably less pow er

5L25

Abstract: A12L A13L IDT70T15
Contextual Info: HIGH-SPEED 2.5V 16/8K X 9 DUAL-PORT STATIC RAM IDT70T16/5L Features ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Commercial:20/25ns max. – Industrial: 25ns (max.) Low-power operation

SP8735B

Abstract: SP8630B SP8690A
Contextual Info: Product index Logarithmic/Limiting Amplifier Type No. Description SL3522 Monolithic 6 stage amplifier successive detection Bandwidth Dynamic Range Page 600MHz 70dB 83 Logarithmic Amplifiers Supply Voltage Supply Current Bandwidth Noise Figure Gain Page Successive detection

CA 5668

Contextual Info: HIGH-SPEED 2.5V 16/8K x 8 DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Commercial: 20/25ns max. – Industrial: 25ns (max.) Low-power operation

Contextual Info: HIGH-SPEED 2.5V 16/8K X 9 DUAL-PORT STATIC RAM IDT70T16/5L Features ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Commercial:20/25ns max. – Industrial: 25ns (max.) Low-power operation

CA91C078

Abstract: xod8 Q00h SCV-64
Contextual Info: O p e n b u s In t e r fa c e C o m p o n e n t s SCV64 User Manual Issue 1 * / bSflfllDl 0 0 0 2 4 0 0 134 T he inform ation in this docum ent is subject to change w ithout notice and should not be construed as a com m itm ent by N ew bridge M icrosystem s. W hile reasonable precautions have been taken, Newbridge

The VMEbus Handbook, Fourth Ed

Abstract: t428 motorola vme 68040 image processing board tundra scv64 MCR t410 SCV64 B14A equivalent kds 6k 24. 576 t428 t430 transistor
Contextual Info: SCV64 User Manual http://www.tundra.com The information in this document is subject to change without notice and should not be construed as a commitment by Tundra Semiconductor Corporation. While reasonable precautions have been taken, Tundra Semiconductor Corporation assumes no responsibility for any errors that may appear in this document.

Contextual Info: Preliminary 5L256 256Kb FRAM Serial 3V Memory Features 256K bit Ferroelectric Nonvolatile RAM • Organized as 32,768 x 8 bits • Unlimited Read/Write Cycles • 10 Year Data Retention • NoDelay Writes • Advanced High-Reliability Ferroelectric Process

S6 68A

Abstract: S4 68A m80c88a
Contextual Info: O K I Semiconductor MSM80C88A-1ORS/GS/JS 8-Bit CMOS MICROPROCESSOR GENERAL D ESC R IPTIO N The MSM80C88 A-10 is internal 16-bit CPUs w ith 8 -bit interface im plem ented in Silicon Gate CMOS t ethnology. 11 is d esigned w ith the sam e processing speed as the NMOS 8 O8 8 - I , b u t w ith consid erabiy

609RS

Abstract: hx101
Contextual Info: C M O S IDT72605 IDT72615 S y n c B iF IF O 2 5 6 x 1 8 x 2 a n d 5 1 2 x 1 8 x 2 Integrated Device Technology, [n o FEATURES: p o w e r bidirectional First-In, Firs t-O u t F IF O m em o rie s , with synchronou s in terfa ce for fast rea d and w rite cycle tim e s. T h e

t7295

Contextual Info: Data Sheet February 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7295-1 E3 Integrated Line Receiver Features Description • Fully integrated receive interface for E3 signals The T7295-1 E3 Integrated Line Receiver is a fully integrated receive interface that terminates a bipolar

FM25L256

Abstract: rg5l25 AN-306 FM25L256B 5L25BG
Contextual Info: AN-306 Differences in 5L256 and 5L256B 256Kb 3V SPI FRAM Devices DESCRIPTION There are differences between the 5L256 and 5L256B 3V SPI 256Kb FRAM devices. As of March 2007, the 5L256 was declared “not recommended for new designs”, and the alternative device

sem 2106 manual

Abstract: sem 2106 sem 2106 data set 64ba
Contextual Info: Openbus Interface Components - SCV64 User Manual 2 Functional Description 2.1 Introduction 2.1.1 Organization of the Functional Description T he functional description o f the SCV 64 is organized into the follow ing sections: 2.1 Introduction 2.2 V M Ebus Requester

MDM 6600

Abstract: mt 1389 de 2061 D nikko AR9344 bosch AL 1115 CV denso alternator 7805/3A bosch al 1450 dv CATERPILLAR 207-1560 ba 4918
Contextual Info: No. 9800-OERF-007 Replaces • Remplace • Substituye No. 9800-OERF-005 Dixie Electric Ltd. OEM CROSS REFERENCE GUIDE DE RÉFÉRENCE GUÍA DE REFERENCIA 2007 Index • Índice AGCO .1

5L25

Contextual Info: PRELIMINARY HIGH-SPEED 2.5V 16/8K X 9 DUAL-PORT STATIC RAM IDT70T16/5L Features ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access – Commercial:20/25ns max. – Industrial: 25ns (max.)