622MBITS Search Results

Contextual Info: 9Ë GEC PLESSEY F e b r u a r y 1997 PRELIMINARY INFORMATION S E M I C O N D U C T O R S DS4468-2.2 P2800 2K x 64BIT MULTI-PORT CONTENT ADDRESSABLE MEMORY The P2800 2K x 64bit Multi-port Content Addressable Memory CAM is designed for address filtering, routing and

PM4329

Contextual Info: PM5337 ADM 622 Preliminary 53 2: 09 :2 LOW / HIGH ORDER CROSSCONNECT 20 04 • Integrated 2.5Gbit/s non-blocking memory based cross-connect supporting anycast traffic • Support switching at STS/AU/VT/TU level and all legal concatenations • Integrated MAPS processing for

Contextual Info: PM5337 ADM 622 Preliminary Integrated Add/Drop Multiplexer for 622 Mbit/s and 155 Mbit/s PM 38 9: :3 11 05 20 n Th ur sd ay • 28xT1 or 21xE1 framers with VT/TU Mapping or integrated M13 Multiplexing • 3xDS-3, E-3 or EC-1 framers and mappers per port selectable with bidirectional performance monitoring

Contextual Info: PM5337 ADM 622 Preliminary 56 1: 02 :3 LOW / HIGH ORDER CROSSCONNECT r, 20 04 • Integrated 2.5Gbit/s non-blocking memory based cross-connect supporting anycast traffic • Support switching at STS/AU/VT/TU level and all legal concatenations • Integrated MAPS processing for

Contextual Info: PM5337 ADM 622 Preliminary 17 4: 08 :2 LOW / HIGH ORDER CROSSCONNECT ,2 00 5 • Integrated 2.5Gbit/s non-blocking memory based cross-connect supporting anycast traffic • Support switching at STS/AU/VT/TU level and all legal concatenations • Integrated MAPS processing for

ADM622

Abstract: PM5337 processor cross reference PM4329 PM5319 PM5366
Contextual Info: PM5337 ADM 622 Preliminary Integrated Add/Drop Multiplexer for 622 Mbit/s and 155 Mbit/s AM 52 :4 5: LOW / HIGH ORDER CROSSCONNECT 04 01 • Integrated 2.5Gbit/s non-blocking memory based cross-connect supporting anycast traffic • Support switching at STS/AU/VT/TU

PCI9030-AA60PI

Abstract: smd transistor 1fp 6b9 smd transistor rc1F ir942 Titania Power Modules PCI9030 lad1 5vdc PM8316 RN204
Contextual Info: PM8316 TEMUX-84 PM8611 SBS-LITE PRELIMINARY REFERENCE DESIGN PMC - 2001170 ISSUE 1 OC-12 LINE CARD REFERENCE DESIGN PM8316 PM8611 TEMUX-84/SBS-LITE OC-12 LINE CARD REFERENCE DESIGN PRELIMINARY ISSUE 1: JUNE 2001 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

"Overflow detection"

Contextual Info: µPD98413 NEASCOT-P65 QUAD 622M ATM/POS SONET FRAMER Draft specification rev0.2 Document No. 2SYSM-FAD-0081 Date Published October 2000 CP(K) NEC Corporation • The information contained in this document is being issued in advance of the production cycle for

CMOS 16-Bit Priority Encoder

Abstract: P2800 DS4440 content addressable memory Wired mae p2800s
Contextual Info: COMMERCIAL-IN-CONFIDENCE P2800 FEBRUARY 1996 PRELIMINARY INFORMATION DS4468-1.0 P2800 2K x 64BIT MULTI-PORT CONTENT ADDRESSABLE MEMORY The P2800 2K x 64bit Multi-port Content Addressable Memory CAM is designed for address filtering, routing and translation applications in Ethernet, Token Ring, SMDS and

Contextual Info: Si GEC PLESSEY S 1' M I C. O l\ D l. PRELIMINARY INFORMATION 1 l K S P2800 2K X 64BIT MULTI-PORT CONTENT ADDRESSABLE MEMORY The P2800 2K x 64bit Multi-port Content Addressable Memory (CAM) is designed for address filtering, routing and translation applications in Ethernet, Token Ring, SMDS and

ddr phy

Abstract: rapidchip LSI coreware library DDR PHY ASIC CW108005 L79301 OC192 LSI Rapidchip Gigablaze serdes CMOS LSI gigablaze serdes
Contextual Info: RapidChip L79301 StreamSlice™ Configurable 10 Gbit/s Platform Advance Datasheet The StreamSlice L79301 Figure 1 is the first platform of the LSI Logic RapidChip configurable-logic family. It greatly reduces the NRE and development costs usually associated with cell-based logic, while

Contextual Info: PM5337 ADM 622 Preliminary Integrated Add/Drop Multiplexer for 622 Mbit/s and 155 Mbit/s PM 58 8: 10 :2 LOW / HIGH ORDER CROSSCONNECT 00 6 • Integrated 2.5Gbit/s non-blocking memory based cross-connect supporting anycast traffic • Support switching at STS/AU/VT/TU

L69301

Abstract: L6930 LSI Rapidchip g12 transistor
Contextual Info: RapidChip L79301 StreamSlice™ Configurable 10 Gbit/s Platform Advance Datasheet The StreamSlice L79301 Figure 1 is the first platform of the LSI Logic RapidChip configurable-logic family. It greatly reduces the NRE and development costs usually associated with cell-based logic, while

0B70

Abstract: STIM 202 GR-253-CORE PMC-1980495 uPD98413 0A48 18 pin 12 channel ir decoder ic
Contextual Info: µPD98413 NEASCOT-P65 QUAD 622M ATM/POS SONET FRAMER Preliminary User’s Manual rev0.1 Document No. 2SYSM-FAD-0166 Date Published September 2001 CP (K) NEC Corporation • The information contained in this document is being issued in advance of the production cycle for

lms algorithm using verilog code

Abstract: lms algorithm using vhdl code ATM machine working circuit diagram using vhdl verilog code for lms adaptive equalizer verilog code for lms adaptive equalizer for audio digital IIR Filter VHDL code 8086 microprocessor based project verilog DTMF decoder qpsk demodulation VHDL CODE verilog code for fir filter using DA
Contextual Info: AMPP Catalog June 1998 About this Catalog June 1998 AMPP Catalog Contents This catalog provides information on Altera Megafunction Partners Program AMPPSM partners and provides descriptions of megafunctions from each AMPP partner. The information in this catalog is current as of