65 E9 Search Results

CR52 resistors

Contextual Info: PACKAGING 1. CF, MF Dimension mm Type EIA RS-296-D A ±0.5 B± 1 B'i 65 52 - CF 1/6 T26 A26 39 - 26 CF 1/4 CF 1/2SS 65 52 - CF 1/4 T26 A26 39 - 26 CF 1/2 65 52 - MF 55 MF 60SS 65 52 - MF 60 MF 65SS 65 52 - MF 65 MF 70SS 65 52 - MF 55 SS CF 1/6 CF 1/4 SS

SN74VC

Abstract: SN74VCX86 c33316 DIODE ZENER D5P
Contextual Info: 14-Bit, 20/40/65 MSPS Dual A/D Converter AD9248 FEATURES Integrated dual 14-bit ADC Single 3 V supply operation 2.7 V to 3.6 V SNR = 71.6 dBc (to Nyquist, AD9248-65) SFDR = 80.5 dBc (to Nyquist, AD9248-65) Low power: 600 mW at 65 MSPS Differential input with 500 MHz, 3 dB bandwidth

CX20501-12

Abstract: CX20464 GR-253 OC-24 CX20501
Contextual Info: CX20501 Quad Multi-Rate CDR 65 Mbps - 3.2 Gbps Data Sheet 20501-DSH-001-B, 3/27/03 Mindspeed Technologies CX20501 CX20501 Quad Multi-Rate CDR (65 Mbps - 3.2 Gbps) Contents Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

cew 55

Contextual Info: =W e9 S H See Pag CAW o R oir / 54 à/to 65 CEW 54 à/to 65 Appellation commerciale / Commercial type CAW 54 9 ± 0,1 Version R 0,3 ± 0,05 15 min. Version AR Version W % Ø 0,8 +- 10 0,05 у 30 CARACTERISTIQUES GENERALES Diélectrique Céramique haute tension

8078 microprocessor pin diagram

Abstract: AD6652BBC 256 ball bga ts101 dsp application note
Contextual Info: 12-Bit, 65 MSPS IF to Baseband Diversity Receiver AD6652 Preliminary Technical Data FEATURES APPLICATIONS Integrated dual-channel ADC Sample rates up to 65 MSPS IF sampling frequencies to 200 MHz Internal ADC voltage reference Integrated ADC sample-and-hold inputs

e140 transformer

Abstract: transformer E166 e141 transformer toshiba e225 Transformer E140 Fairchild E212 ADP3330ART-3.3 E212 transistor AD10242 AD10465
Contextual Info: a Dual Channel, 14-Bit, 65 MSPS A/D Converter with Analog Input Signal Conditioning AD10465 FEATURES Dual, 65 MSPS Minimum Sample Rate Channel-to-Channel Matching, ؎0.5% Gain Error Channel-to-Channel Isolation, >90 dB DC-Coupled Signal Conditioning Included

Contextual Info: =W e9 S H e Pag CAW 54 à/to 65 CEW 54 à/to 65 Appellation commerciale / Commercial type CAW 54 L, W, T : ± 0,5 mm 9 ± 0,1 Version R 15 min. 0,3 ± 0,05 Version AR Version W % Ø 0,8 +- 10 0,05 у 30 CARACTERISTIQUES GENERALES Diélectrique Céramique haute tension

akos

Abstract: H723 AD10677BWS 20-PIN 74LCX16374 AD10677 p8p10 SMD n3 ad10667
Contextual Info: 16-Bit, 65 MSPS A/D Converter AD10677 PERFORMANCE FEATURES 65 MSPS Sample Rate 80 dBFS Signal-to-Noise Ratio Transformer Coupled Analog Input Single PECL Clock Source Digital Outputs True Binary Format 3.3 V and 5 V CMOS Compatible FUNCTIONAL BLOCK DIAGRAM

db c 386

Abstract: ericsson texas codec PBL 402 15 HPRF1 diode db2
Contextual Info: Preliminary May 2000 PBL 386 65/2 Subscriber Line Interface Circuit Description Key Features The PBL 386 65/2 Subscriber Line Interface Circuit SLIC is a 90 V bipolar integrated circuit for use in DLC, Central Office and other telecommunications equipment. The

rsn 311

Abstract: RPX 10 PLC programming ERICSSON RNC driver AAK Ericsson GM 12
Contextual Info: ERICSSON ^ Preliminary October 1998 PBL 386 65/2 Subscriber Line Interface Circuit Description Key Features The PBL 386 65/2 Subscriber Line Interface Circuit SLIC is a 90 V bipolar integrated circuit tor use in DLC, Central Office and other telecommunications equipment. The

SI11-0

Abstract: H723 AD10677 AD10677BWS
Contextual Info: 16-Bit, 65 MSPS A/D Converter AD10677 FEATURES 65 MSPS Sample Rate 80 dBFS Signal-to-Noise Ratio Transformer-Coupled Analog Input Single PECL Clock Source Digital Outputs True Binary Format 3.3 V and 5 V CMOS Compatible FUNCTIONAL BLOCK DIAGRAM AIN AD10677

AD10677

Abstract: macrocell ecl
Contextual Info: 16-Bit, 65 MSPS A/D Converter AD10677 FUNCTIONAL BLOCK DIAGRAM FEATURES 65 MSPS sample rate 80 dBFS signal-to-noise ratio Transformer-coupled analog input Single PECL clock source Digital outputs True binary format 3.3 V and 5 V CMOS-compatible AIN AD10677

Contextual Info: 16-Bit, 65 MSPS A/D Converter AD10677 FUNCTIONAL BLOCK DIAGRAM FEATURES 65 MSPS sample rate 80 dBFS signal-to-noise ratio Transformer-coupled analog input Single PECL clock source Digital outputs True binary format 3.3 V and 5 V CMOS-compatible AIN AD10677

BC811

Abstract: AD15452 AD15452BBC ANSI-644
Contextual Info: 12-Bit 65 MSPS Quad A/D Converter with Integrated Signal Conditioning AD15452 FEATURES PRODUCT HIGHLIGHTS 12-bit, 65 MSPS, quad, analog-to-digital converter Differential input with 100 Ω input impedance Full-scale analog input: 296 mV p-p 200 MHz, 3 dB bandwidth

Contextual Info: a Dual Channel, 14-Bit, 65 MSPS A/D Converter with Analog Input Signal Conditioning AD13465 FEATURES Dual, 65 MSPS Minimum Sample Rate Channel-to-Channel Matching, ؎1% Gain Error 90 dB Channel-to-Channel Isolation DC-Coupled Signal Conditioning 85 dB Spurious-Free Dynamic Range

BJ1-BJ10

Abstract: AD13280 AD13465 D10A D11A D12A D12B
Contextual Info: a Dual Channel, 14-Bit, 65 MSPS A/D Converter with Analog Input Signal Conditioning AD13465 FEATURES Dual, 65 MSPS Minimum Sample Rate Channel-to-Channel Matching, ؎1% Gain Error 90 dB Channel-to-Channel Isolation DC-Coupled Signal Conditioning 85 dB Spurious-Free Dynamic Range

rcf art

Abstract: AD6652 IMT-2000 IS136 PA10 FPGA CIC Filter ts101 dsp application note JC51
Contextual Info: 12-Bit, 65 MSPS IF to Baseband Diversity Receiver AD6652 FEATURES APPLICATIONS SNR = 90 dB in 150 kHz bandwidth to Nyquist @ 61.44 MSPS Worst harmonic = 83 dBc (to Nyquist @ 61.44 MSPS) Integrated dual-channel ADC: Sample rates up to 65 MSPS IF sampling frequencies to 200 MHz

SI1100

Abstract: smd code MH1 AD10677 SI11-0 WS-120 03208-B-015
Contextual Info: 16-Bit, 65 MSPS A/D Converter AD10677 65 MSPS sample rate 80 dBFS signal-to-noise ratio Transformer-coupled analog input Single PECL clock source Digital outputs True binary format 3.3 V and 5 V CMOS compatible FUNCTIONAL BLOCK DIAGRAM AIN AD10677 AIN 14 ADC

74LCX1673MTD

Abstract: Analog Devices d3b AD13280 AD13465 D10A D11A D12A D12B sm 047f 4552 VT
Contextual Info: a Dual Channel, 14-Bit, 65 MSPS A/D Converter with Analog Input Signal Conditioning AD13465 FEATURES Dual, 65 MSPS Minimum Sample Rate Channel-to-Channel Matching, ؎1% Gain Error 90 dB Channel-to-Channel Isolation DC-Coupled Signal Conditioning 85 dB Spurious-Free Dynamic Range

Contextual Info: 12-Bit, 65 MSPS IF to Baseband Diversity Receiver AD6652 FEATURES APPLICATIONS SNR = 90 dB in 150 kHz bandwidth to Nyquist @ 61.44 MSPS Worst harmonic = 83 dBc (to Nyquist @ 61.44 MSPS) Integrated dual-channel ADC: Sample rates up to 65 MSPS IF sampling frequencies to 200 MHz

BC 641

Contextual Info: 12-Bit, 65 MSPS, Dual ADC AD15252 FUNCTIONAL BLOCK DIAGRAM FEATURES AD15252 12-bit, 65 MSPS dual ADC Differential input with 100 Ω input impedance Full-scale analog input: 296 mV p-p 170 MHz, 3 dB bandwidth SNR −9 dBFS : 64 dBFS (70 MHz AIN), 64 dBFS (140 MHz AIN)

D08B

Abstract: D09A 74VHC04MTC 74VHC541MTC AD15252 TC1-1-13M TP10 BC 641 gps tod format
Contextual Info: 12-Bit, 65 MSPS, Dual ADC AD15252 FUNCTIONAL BLOCK DIAGRAM FEATURES AD15252 12-bit, 65 MSPS dual ADC Differential input with 100 Ω input impedance Full-scale analog input: 296 mV p-p 170 MHz, 3 dB bandwidth SNR −9 dBFS : 64 dBFS (70 MHz AIN), 64 dBFS (140 MHz AIN)

BC 641

Contextual Info: 12-Bit, 65 MSPS, Dual ADC AD15252 FUNCTIONAL BLOCK DIAGRAM FEATURES AD15252 12-bit, 65 MSPS dual ADC Differential input with 100 Ω input impedance Full-scale analog input: 296 mV p-p 170 MHz, 3 dB bandwidth SNR −9 dBFS : 64 dBFS (70 MHz AIN), 64 dBFS (140 MHz AIN)

uPD65

Abstract: PC10 PD64A PD6600A
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD64A, 65 4-BIT SINGLE-CHIP MICROCONTROLLERS FOR INFRARED REMOTE CONTROL TRANSMISSION DESCRIPTION The µPD64A and 65 feature low-voltage 2.0 V operation, and incorporate a carrier generator for infrared remote control transmission, a standby release function through key entry, and a programmable timer, making them ideal