66S303 Search Results

NS16C450N

Contextual Info: TL16C450 ASYNCHRONOUS COMMUNICATIONS ELEM ENT 0 3 0 9 6 , M A R C H 1 9 8 8 - R E V IS E O A P R IL 1 9 8 9 N DUAL-IN-LINE PACKAGE • Programmable Baud Rate Generator Allows Division of Any Input Reference Clock by 1 to 216 - 1 and Generates an Internal 16 X

SN74LVCC4245

Contextual Info: SN74LVCC4245 OCTAL BUS TRANSCEIVER WITH ADJUSTABLE OUTPUT VOLTAGE AND 3-STATE OUTPUTS _ SCAS584A - NOVEMBER 1696 - REVISED JANUARY 1997 EPICrM Enhanced-Performance Implanted CMOS Submicron Process DB, DW, OR PW PACKAGE

Contextual Info: TM S4500A DYNAMIC RAM CONTROLLER D 2 6 7 4 . JA N U A R Y 1982 TM S 4500A Controls Operation of 8K, 16K, 32K , and 64 K Dynam ic RAMs CLK ROY One Package Contains Address M ultiplexer, Refresh Control, and Timing Control • RENI CS ALE Directly Addresses and Drives Up to 2 5 6 K

Contextual Info: SN74HC4066 QUADRUPLE BILATERAL ANALOG SWITCH _ S C L S 3 2 6 A -M A R C H 1 9 9 6 - REVISED JULY 1996 • High Degree of Linearity • High On-Off Output Voltage Ratio • Low Crosstalk Between Switches • Low On-State Impedance —

Contextual Info: SN74LVC544 OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS I SCAS346A - MARCH 1994 - REVISED JULY 1995 DB, DW, OR PW PACKAGE TOP VIEW Typical V q l p (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C LEB A[ 1 U [ 2 A1[ 3 A2 [ 4 A3[ 5 A4[ 6 A5 [ 7

PVA c17

Abstract: FL-41 b24 b03 TLC5733 wj a75 TLC5733IPM
Contextual Info: TLC5733 20 MSPS 3-CHANNEL ANALOG-TO-DIGITAL CONVERTER WITH HIGH-PRECISION CLAMP SLAS104-JULY 1995 3-Channel CMOS ADC 8-Bit Resolution Analog Input Bandwidth. . . >14 MHz Suitable for YUV or RGB Applications Digital Clamp Optimized for NTSC or PAL YUV Component

25x16v

Contextual Info: SN54LV165, SN74LV165 PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCES007B - MARCH 1996 - REVISED APRIL 1996 EPIC Enhanced-Performance Implanted CMOS 2-n Process typical Vq l p (Output Ground Bounce) < 0.8 V at V c c . Ta = 25°C Typical V q h v (Output V q h Undershoot)

Contextual Info: SN54AS823A, SN74AS823A, SN74AS824A 9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS _ SDAS231A - JUNE 1964 - REVISED AUGUST 1995 • Functionally Equivalent to AMD’s AM29823 and AM29824 • Provide Extra Data Width Necessary for Wider Address/Data Paths or Buses With

TPIC1310

Abstract: POWER DMOS ARRAY
Contextual Info: TPIC1310 3-HALF H-BRIDGE GATE PROTECTED POWER DMOS ARRAY _ SUS071 - DECEMBER 1997 Configured for 3-Phase Brushless Motor Drive KTR or KTSPACKAGE TOP VIEW Low rDs(on) . . . 0.25 Q Typ High Voltage Output. . . 30 V Pulsed Current. . . 12 A Per Channel

KNC 201 15

Abstract: TLC0820 application note knc 201 interfacing D615C ADC0820-1 TLC0820 KNC 201 knc 201 11 ADC0820 application note KNC 201 01
Contextual Info: TEXAS INSTR LIN/INTFC SOE D • a^bl724 OOflSStM 132 ■ T i m TLC0820A, TLC0820B,. ADC0820B, ADC0820C Advanced LinCMOS’" HIGH SPEED 8-BIT ANALOG-TODIGITAL CONVERTERS USING MODIFIED "FLASH" TECHNIQUES 028 73, SEPTEMBER 1986—REVISED FEBRUARY 1989 •

1B12

Abstract: SN74ALVCH16270
Contextual Info: SN74ALVCH16270 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS SCES028-JULY 1995 DGQ OR DL PACKAGE TOP VIEW • Member of the Texas Instruments WIdebus Family • EP/C™ (Enhanced-Performance Implanted CMOS) Submicron Process • ESD Protection Exceeds 2000 V Per

54AHC139

Abstract: HC139P
Contextual Info: SN54AHC139, SN74AHC139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS259C- DECEMBER 1 9 9 5 - REVISED JUNE 1996 • • Operating Range 2-V to 5.5-V Vcc EPIC"* Enhanced-Performance Implanted CMOS Process Designed Specifically for High-Speed Memory Decoders and Data Transmission

Contextual Info: SN54ALS646, SN54ALS648, SN54AS646 SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SDAS039F - DECEMBER 1983 - REVISED JANUARY 1995 Independent Registers for A and B Buses Multiplexed Real-Time and Stored Data

SN74ALSOOA

Abstract: SN54ASOO
Contextual Info: SN54ALS00A, SN54AS00, SN74ALS00A, SN74AS00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SDAS187A - APRIL 1982 - R EVISED DECEMBER 1994 • Package Options Include Plastic Small-Outllne D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

Contextual Info: SN54HC174, SN74HC174 HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS119A - DECEM BER 1982 - REVISED JANUARY 1996 Contain Six Flip-Flops With Single*Rall Outputs Applications Include: - Buffer/Storage Registers - Shift Registers - Pattern Generators Package Options Include Plastic

Contextual Info: SN54HC244, SN74HC244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS S C L S 1 3 0 A -D E C E M B E R 1 9 6 2 -R E V IS E D JANUARY 1996 • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers High-Current Outputs Drive up to 15 LSTTL Loads

SCBD002B

Abstract: ta 8109 V22-O JB318 SN74LVC424S
Contextual Info: SN74LVC4245 OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS I SCAS375A - MARCH 1994 - REVISED JULY 1995 DB, DW, OR PW PACKAGE • EPIC1“ Enhanced-Performance Implanted CMOS Submicron Process (TOP VIEW) | (5 V) V CCA [ 1 • Package Options Include Plastic

en33b

Abstract: SN65C198
Contextual Info: SN65C198, SN75C198 QUADRUPLE LOW-POWER LINE DRIVER D 3 4 7 2 , JU LY 1 9 9 0 • Meets EIA-232-D Revision of RS-232-C • Very Low Supply Current . . . 116 pA Typ • • D, OB, OR N P AC KA G E (TO P V IE W ) vcc- C TTU ü Sleep Mode: 3-State Outputs In High-lmpedance State

6S30S

Contextual Info: SN54LVT646, SN74LVT646 3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS I SCBS140D- MAY 1992- REVISED JULY 1995 SN54LVT646. . . JT OR W PACKAGE SN74LVT646 . . . DB, DW, OR PW PACKAGE {TOP VIEW State-of-the-Art Advanced BICMOS Technology ABT) Design for 3.3-V

Contextual Info: SN54ABT823, SN74ABT823 9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS S C B S 1 5 8 C -J A N U A R Y 1991 - REVISED JULY 1994 State-of-the-Art EP/C-IIB BiCMOS Design Significantly Reduces Power Dissipation SN54ABTB23 . . JT OR W PACKAGE SN74ABT823 . . . DB, DW, OR NT PACKAGE

Wiring DIAGRAM OF 7 INCH TFT MONITOR

Abstract: 6N137 Optocoupler 6N137 application note 7g2as 6N137 S261 hp 6n137 6N137 on semiconductor S6303
Contextual Info: 6N137 OPTOCOUPLER/OPTOISOLATOR 500S003 • 0 2 9 IB . JULY 1986 Gallium Arsenide Phosphide LED Optically Coupled to Integrated Circuit Detector • Compatible with TTL and LSTTL Inputs • Low Input Current Required to Turn Output • High-Voltage Electrical Insulation . . . 3 0 0 0 V DC Min

Contextual Info: SN54BCT620A, SN74BCT620A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SC BS 001B - SEPTEMBER 1 9 8 7 - REVISED NOVEMBER 1993 SN54BCT620A. . . J OR W PACKAGE SN74BCT620A. . . DW OR N PACKAGE TOP VIEW State-of-the-Art BiCMOS Design Significantly Reduces Iccz

S6364

Contextual Info: SN74AS6364 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION CIRCUIT D3312, FEBRUARY 1990-REVISED JUNE 1990 17 X 17 G A P A C K A G E TOP VIE W 12-ns Max Pass-Thru Operation W hen Used in Correct-O nly-O n-Error C onfigurations 9 10 11 12 13 14 15 16 17 Detects and Corrects Single-Bit Errors

Contextual Info: SN74LVC16646 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS SCAS318B - NOVEMBER 1993 - REVISED JULY 1995 Member of the Texas Instruments Wldebus Family EPIC ™ Enhanced-Performance Implanted CMOS Submicron Process Typical Vq lp (Output Ground Bounce)