68LEAD Search Results

Contextual Info: 1 AUSTIN SEMICONDUCTOR, INC. AS8F2M 32 2MEG x 32 FLASH ~ FLASH MODULE AVAILABLE AS MILITARY SPECIFICATIONS PIN ASSIGNMENT Top View SMD 5962-97531 MIL-STD-883 68LeadCQFP FEATURES ,/] OPTION • • n n in o ri Q /C < E C C < r< E |C J L D |o |> C < E < E C < r>

tfm 1010

Abstract: G0b35
Contextual Info: 80C286 i l i HARRIS August 1995 High Performance Microprocessor With Memory Management and Protection 68LEadpga Features Pin Configurations • C om patib le with N M O S 8 0 2 8 6 Com ponent Pad View — As viewed from underside of the component when mounted on the board.

10S8

Contextual Info: I AUSTIN SEMICONDUCTOR, INC. AS8F2M32 2MEG x 32 FLASH f FLASH MODULE AVAILABLE AS MILITARY SPECIFICATIONS PIN ASSIGNMENT Top View SMD 5962-97531 MIL-STD-883 68LeadCQFP FEATURES ,/] OPTION • • n n in o ri Q /C < E C C < r< E |C J L D |o |> C < E < E C < r>

TMS320P17

Abstract: d6151 filter lark eng 1D2T ltw 8 pin TMS320P14 TMS320LC15
Contextual Info: TMS320C1X DIGITAL SIGNAL PROCESSORS J A N U A H Y 1 9 8 7 — R E V IS E D J U L Y 1991 • Performance Up to 8.77 MIPs Commercial and Military Versions Available • All TMS320C1x Devices are Object Code Compatible Operating Free-Air Temperature . . . 0°C to 70°C

ADC16DV160

Contextual Info: ADC16DV160 ADC16DV160 Dual Channel, 16-Bit, 160 MSPS Analog-to-Digital Converter with DDR LVDS Outputs Literature Number: SNAS488G ADC16DV160 Dual Channel, 16-Bit, 160 MSPS Analog-to-Digital Converter with DDR LVDS Outputs General Description The ADC16DV160 is a monolithic dual channel high performance CMOS analog-to-digital converter capable of converting analog input signals into 16-bit digital words at rates up to

HIP-66

Contextual Info: FLASH AS8FLC1M32 FIGURE 1: PIN ASSIGNMENT Top View Hermetic, Multi-Chip Module (MCM) 32Mb, 1M x 32, 3.0Volt Boot Block FLASH Array Available via Applicable Specifications: • MIL-PRF-38534, Class H FEATURES • • • • • • • • • • • •

K1115

Abstract: AD10242 AD9042 AD9632 D10A D11A OP279
Contextual Info: a Dual, 12-Bit, 40 MSPS MCM A/D Converter with Analog Input Signal Conditioning AD10242 The AD10242 operates with ± 5.0 V for the analog signal conditioning with a separate 5.0 V supply for the analog-to-digital conversion. Each channel is completely independent, allowing

CY7C4255V

Abstract: CY7C4265V CY7C4275V CY7C4285V CY7C42X5V
Contextual Info: fax id: 5422 CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V PRELIMINARY 8K/16K/32K/64Kx18 Low Voltage Deep Sync FIFOs Features Functional Description The CY7C4255/65/75/85V are high-speed, low-power, first-in first-out FIFO memories with clocked read and write interfaces. All are 18 bits wide and are pin/functionally compatible to

512K32

Abstract: 9Q512K32 UT9Q512 UT9Q512K32
Contextual Info: Standard Products UT9Q512K32 16Megabit SRAM MCM Advanced Data Sheet January 15, 2001 FEATURES q 35ns maximum 5 volt supply address access time q Asynchronous operation for compatible with industry standard 512K x 8 SRAMs q TTL compatible inputs and output levels, three-state

CY7C4205V

Abstract: CY7C4215V CY7C4225V CY7C4235V CY7C4245V CY7C42X5V CY7C4425V
Contextual Info: fax id: 5417 CY7C4425V/4205V/4215V PRELIMINARY CY7C4225V/4235V/4245V 64/256/512/1K/2K/4K x18 Low Voltage Synchronous FIFOs Features • 3.3V operation for low power consumption and easy integration into low voltage systems • High-speed, low-power, first-in first-out FIFO

729h

Abstract: Z8*6421 Z8F642 PS019913-0305
Contextual Info: High Performance 8-Bit Microcontrollers Z8 Encore! 64K Series Product Specification PS019913-0305 Preliminary ZiLOG Worldwide Headquarters • 532 Race Street • San Jose, CA 95126-3432 Telephone: 408.558.8500 • Fax: 408.558.8300 • www.ZiLOG.com This publication is subject to replacement by a later edition. To determine whether

COP888GW

Abstract: V68A
Contextual Info: August 1996 COP888GW 8-Bit Microcontroller with Pulse Train Generators and Capture Modules General Description The COP888 family of microcontrollers uses an 8-bit single chip core architecture fabricated with National Semiconductor’s M2CMOS process technology. The COP888GW is a

Contextual Info: PACE1753 SINGLE CHIP, 40MHz CMOS MMU/COMBO 4 FEATURES Implements the MIL-STD-1750A Instruction Set Architecture for Memory Management and Protection of up to 1 Megaword. A ll mapping memory 10,240 bfts for both the MMU and BPU functions are Included on the chip.

L9141

Abstract: FEATURES of TMS320 C 54 XX PROCESSOR lph 7670 TMS32020 TMS320 LA 7670 68-PIN TMS320C25 dummy 68pin DFDP-TI001
Contextual Info: T M S 32 0 SECOND GENERATION DIGITAL SIGNAL PROCESSORS MAY 6 8 -P IN GB • 100-n s Instruction Cycle Time • 5 4 4 Words of Programmable On-Chip Data RAM PIN GR ID A R R A Y C E R A M IC P A C K A G E T • 4K Words of On-Chip Program ROM • 128K Words of Data/Program Space

CY7C381P

Abstract: CY7C381P-0JC CY7C381P-XJC CY7C381P-XJI CY7C382P CY7C383A CY7C385P 100-Pin CPGA Package Pin-Out Diagram
Contextual Info: CY7C381P CY7C382P CYPRESS Features • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-chip operating frequencies up to 110 MHz — Input + logic cell + output delays under 6 ns • Unparalleled FPGA performance for counters, data path, state machines,

Contextual Info: Standard Products QCOTSTM UT8Q512K32 16Megabit SRAM MCM Data Sheet January 21, 2002 FEATURES q 25ns maximum 3.3 volt supply address access time q MCM contains four (4) 512K x 8 industry-standard asynchronous SRAMs; the control architecture allows operation as 8, 16, 24, or 32-bit data width

Contextual Info: Standard Products UT8ER512K32 Monolithic 16M RadHard SRAM Preliminary Data Sheet May 21, 2007 www.aeroflex.com/radhardsram INTRODUCTION FEATURES ‰ 20ns read, 10ns write maximum access times ‰ Functionally compatible with traditional 512K x 32 SRAM devices

Dose

Contextual Info: Standard Products UT82CRH51A USART Preliminary Data Sheet December 9, 1999 FEATURES INTRODUCTION q Synchronous and asynchronous operation q Synchronous 5-8 bit characters; internal or external character synchronization; automatic synchronization insertion

TMS320P14

Abstract: TMS320LC15
Contextual Info: TMS320C1x DIGITAL SIGNAL PROCESSORS SPRS009C – JANUARY 1987 – REVISED JULY 1991 • • • • • • • • • • • • • • • Performance Up to 8.77 MIPs • • All TMS320C1x Devices are Object Code Compatible 144/256-Word On-Chip Data RAM

Contextual Info: Standard Products QCOTSTM UT9Q512K32 16Megabit SRAM MCM Advanced Data Sheet August 6, 2001 FEATURES q 35ns maximum 5 volt supply address access time q Asynchronous operation for compatible with industry standard 512K x 8 SRAMs q TTL compatible inputs and output levels , three-state

Contextual Info: Standard Products QCOTSTM UT8Q512K32 16Megabit SRAM MCM Preliminary Data Sheet June 20, 2001 FEATURES q 35ns maximum 3.3 volt supply address access time q MCM contains four (4) 512K x 8 industry-standard asynchronous SRAMs; the control architecture allows

Contextual Info: Standard Products QCOTSTM UT8Q512K32 16Megabit SRAM MCM Advanced Data Sheet December 17, 2001 FEATURES q 25ns maximum 3.3 volt supply address access time q MCM contains four (4) 512K x 8 industry-standard asynchronous SRAMs; the control architecture allows

5962-0422

Contextual Info: Standard Products UT8CR512K32 16 Megabit SRAM Advanced Data Sheet March 2006 www.aeroflex.com/4MSRAM FEATURES ‰ 17ns maximum access time ‰ Asynchronous operation for compatibility with industrystandard 512K x 8 SRAMs ‰ CMOS compatible inputs and output levels, three-state

UT9Q512K32

Contextual Info: Standard Products UT9Q512K32E 16 Megabit RadTolerant SRAM MCM Data Sheet June 28, 2011 INTRODUCTION The UT9Q512K32E RadTol product is a high-performance 2M byte 16Mbit CMOS static RAM multi-chip module (MCM), organized as four individual 524,288 x 8 bit SRAMs with a