UT8ER512K32 Search Results

Contextual Info: Standard Products UT8ER512K32 Monolithic 16M RadHard SRAM Preliminary Data Sheet May 21, 2007 www.aeroflex.com/radhardsram INTRODUCTION FEATURES ‰ 20ns read, 10ns write maximum access times ‰ Functionally compatible with traditional 512K x 32 SRAM devices

UT8ER

Abstract: UT8ER512K
Contextual Info: Standard Products UT8ER512K32 Monolithic 16M RadHard SRAM Preliminary Data Sheet September 28, 2006 www.aeroflex.com/radhard INTRODUCTION FEATURES ‰ 20ns read, 10ns write maximum access times ‰ Functionally compatible with traditional 512K x 32 SRAM devices

TDQ31

Contextual Info: Standard Products UT8ER512K32 Monolithic 16M RadHard SRAM Advanced Data Sheet May, 2006 The UT8ER512K32 is a high-performance CMOS static RAM organized as 524,288 words by 32 bits. Easy memory expansion is provided by active LOW and HIGH chip enables E1, E2 , an

UT8ER512K32

Contextual Info: Standard Products UT8ER512K32 Monolithic 16M SRAM Data Sheet July 24, 2012 www.aeroflex.com/memories INTRODUCTION FEATURES  20ns Read, 10ns Write maximum access times  Functionally compatible with traditional 512K x 32 SRAM devices  CMOS compatible input and output levels, three-state

UT8ER512K32

Contextual Info: Standard Products UT8ER512K32 Monolithic 16M RadHard SRAM Preliminary Data Sheet September, 2006 www.aeroflex.com/radhard INTRODUCTION FEATURES ‰ 20ns maximum access time ‰ Asynchronous operation, functionally compatible with industry-standard 512K x 32 SRAMs

aeroflex sram edac

Abstract: Aeroflex International
Contextual Info: Standard Products UT8ER512K32 Monolithic 16M RadHard SRAM Advanced Data Sheet May, 2006 www.aeroflex.com/radhard INTRODUCTION FEATURES ‰ 20ns maximum access time ‰ Asynchronous operation, functionally compatible with industry-standard 512K x 32 SRAMs ‰ CMOS compatible inputs and output levels, three-state

UT8ER512K32

Abstract: SRAM edac UT8ER512K32S mbe regulator RAM SEU RAM EDAC SEU
Contextual Info: Design Information Fact Sheet UT8ER512K32 Monolithic 16M RadHard SRAM INTRODUCTION FEATURES ‰ 20ns read, 10ns write maximum access times ‰ Functionally compatible with traditional 512K x 32 SRAM devices ‰ CMOS compatible inputs and output levels, three-state

UT8ER512K32

Abstract: UT8ER512K32S UT8ER512K32M aeroflex sram edac
Contextual Info: Standard Products UT8ER512K32 Monolithic 16M SRAM Data Sheet June 25, 2010 www.aeroflex.com/memories INTRODUCTION FEATURES ‰ 20ns Read, 10ns Write maximum access times ‰ Functionally compatible with traditional 512K x 32 SRAM devices ‰ CMOS compatible input and output levels, three-state

SRAM edac

Contextual Info: Standard Products UT8ER512K32 Monolithic 16M RadHard SRAM Advanced Data Sheet March, 2006 INTRODUCTION FEATURES ‰ 20ns maximum access time ‰ Asynchronous operation, functionally compatible with industry-standard 512K x 32 SRAMs ‰ CMOS compatible inputs and output levels, three-state

UT8ER512K32

Abstract: SRAM edac RAM EDAC SEU Dose
Contextual Info: Standard Products UT8ER512K32 Monolithic 16M RadHard SRAM Preliminary Data Sheet March 4, 2008 www.aeroflex.com/radhardsram INTRODUCTION FEATURES ‰ 20ns Read, 10ns Write maximum access times ‰ Functionally compatible with traditional 512K x 32 SRAM devices

UT8ER512K32

Abstract: UT8ER512K SRAM edac RAM EDAC SEU OP167
Contextual Info: Standard Products UT8ER512K32 Monolithic 16M SRAM Data Sheet January 31, 2011 www.aeroflex.com/memories INTRODUCTION FEATURES  20ns Read, 10ns Write maximum access times  Functionally compatible with traditional 512K x 32 SRAM devices  CMOS compatible input and output levels, three-state

UT8ER512K32

Abstract: RAMDE scrub SRAM edac UT8ER512K32S
Contextual Info: Aeroflex Colorado Springs Application Note Designing with the UT8ER512K32 Monolithic 16M RadHardTM SRAM 1. Introduction This application note describes how to use the UT8ER512K32 Monolithic 16M RadHard SRAM in different system configurations, including a detailed look at the bus signals and CPU interface. The reader will also gain an understanding of how error detection and correction EDAC functions and improves error rate.

UT8ER512K32

Contextual Info: Standard Products UT8ER512K32 Monolithic 16M SRAM Data Sheet January 31, 2011 www.aeroflex.com/memories INTRODUCTION FEATURES ‰ 20ns Read, 10ns Write maximum access times ‰ Functionally compatible with traditional 512K x 32 SRAM devices ‰ CMOS compatible input and output levels, three-state

Contextual Info: Standard Products UT8ER512K32 Monolithic 16M SRAM Preliminary Data Sheet February, 2009 www.aeroflex.com/memories INTRODUCTION FEATURES ‰ 20ns Read, 10ns Write maximum access times ‰ Functionally compatible with traditional 512K x 32 SRAM devices ‰ CMOS compatible input and output levels, three-state

Contextual Info: Standard Products UT8ER512K32 Monolithic 16M SRAM Preliminary Data Sheet February, 2009 www.aeroflex.com/memories INTRODUCTION FEATURES ‰ 20ns Read, 10ns Write maximum access times ‰ Functionally compatible with traditional 512K x 32 SRAM devices ‰ CMOS compatible input and output levels, three-state

UT8ER512K32

Abstract: edac SRAM edac UT8ER512K32S aeroflex sram edac
Contextual Info: Aeroflex Colorado Springs Errata Date: March 24, 2008 Part Number: UT8ER512K32 Monolithic 16M RadHard SRAM Silicon Revision: Revision B Prototypes Affected Date Codes: All Revision B Prototypes Data Sheet Specification for UT8ER512K32M and UT8ER512K32S RECOMMENDED OPERATING CONDITIONS

UT8ER512K32

Contextual Info: Standard Products UT8ER512K32 Monolithic 16M RadHard SRAM Preliminary Data Sheet September 28, 2006 www.aeroflex.com/radhard INTRODUCTION FEATURES ‰ 20ns read, 10ns write maximum access times ‰ Functionally compatible with traditional 512K x 32 SRAM devices

UT8ER512K32

Abstract: aeroflex sram edac
Contextual Info: Standard Products UT8ER512K32 Monolithic 16M SRAM Preliminary Data Sheet September 4, 2008 www.aeroflex.com/memories INTRODUCTION FEATURES ‰ 20ns Read, 10ns Write maximum access times ‰ Functionally compatible with traditional 512K x 32 SRAM devices ‰ CMOS compatible input and output levels, three-state

Memories

Contextual Info: Standard Products UT8R512K8 512K x 8 SRAM Data Sheet March 2009 www.aeroflex.com/memories FEATURES ‰ 15ns maximum access time ‰ Asynchronous operation for compatibility with industrystandard 512K x 8 SRAMs ‰ CMOS compatible inputs and output levels, three-state

UT8SDMQ64M48

Abstract: UT8SDMQ64M40 mev smd diode UT8Q512E UT8R128K32 5962-04 SDRAM UT8SDMQ64M48 die 5962-0422 "rad" sram UT8ER512K32
Contextual Info: Aeroflex Colorado Springs A passion for performance. Over 20 years experience in HiRel memories 50 to 300 krads Si 4.0 Mbit to 3.0 Gbit options Best-in-class bit density per square inch Flight proven HiRel Memories V SM D# Q& QM L Fla tpa ck Lat ch Me -Up I

Memories

Abstract: UT8R512K8
Contextual Info: Standard Products UT8R128K32 128K x 32 SRAM Data Sheet March 2009 www.aeroflex.com/memories INTRODUCTION FEATURES ‰ 15ns maximum access time ‰ Asynchronous operation, functionally compatible with industry-standard 128K x 32 SRAMs ‰ CMOS compatible inputs and output levels, three-state

RTAX2000

Abstract: UT16AD80P m38510/55501 UT63M143 MIP7965-750B1 5962-8869203 vhdl code manchester encoder UT54LVDM055LV SMD custom precision rESISTOR network h009 SPECIFICATION
Contextual Info: A passion for performance. Aeroflex Colorado Springs Aeroflex Gaisler Aeroflex Plainview Product Short Form Microelectronic Solutions October 2010 HiRel from Aeroflex Colorado Springs UT69151 SµMMIT DXE • UT69151 SµMMIT™ XTE ■ UT69151 SµMMIT™ RTE

Memories

Abstract: UT8CR512K32
Contextual Info: Standard Products UT8CR512K32 16 Megabit SRAM Data Sheet March 2009 www.aeroflex.com/Memories INTRODUCTION FEATURES ‰ 17ns maximum access time ‰ Asynchronous operation for compatibility with industrystandard 512K x 8 SRAMs ‰ CMOS compatible inputs and output levels, three-state

Contextual Info: Standard Products UT9Q512E 512K x 8 RadTol SRAM Data Sheet September, 2008 INTRODUCTION The UT9Q512E RadTol product is a high-performance CMOS static RAM organized as 524,288 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable E , an