72M TRANSISTOR Search Results

72m transistor

Abstract: SCT-595 marking E1 SCT-595 marking PAs SCT-595 kw33 transistor marking 72m
Contextual Info: BCP 72M PNP Silicon AF Power Transistor 4
Drain switch for RF power amplifier stages
For AF driver and output stages 5
High collector current
Low collector-emitter saturation voltage 3 2 1 VPW05980 Type Marking BCP 72M PAs Pin Configuration Package

CES2302

Contextual Info: CES2302 N-Channel Enhancement Mode Field Effect Transistor FEATURES 20V, 3.0A, RDS ON = 72mΩ @VGS = 4.5V. RDS(ON) = 110mΩ @VGS = 2.5V. High dense cell design for extremely low RDS(ON). Lead free product is acquired. D Rugged and reliable. SOT-23 package.

Contextual Info: SIEMENS BCP 72M PNP Silicon AF Power Transistor Preliminary data • Drain switch for RF power amplifier stages • For AF driver and output stages • High collector current • Low collector-emitter saturation voltage o II LD Q62702-C2517 II PAs Package

transistor marking 72m

Abstract: 72m transistor marking PAs
Contextual Info: SIEMENS BCP 72M PNP Silicon AF Power Transistor Preliminary data • Drain switch for RF power amplifier stages • For AF driver and output stages • High collector current • Low collector-emitter saturation voltage O II LO T" Package OQ II Q62702-C2517

MARKING 54M SOT-23

Abstract: DMN3150L DMN3150L-7 J-STD-020D
Contextual Info: DMN3150L N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR Please click here to visit our online spice models database. Features Mechanical Data • • • • • • • • • • Low On-Resistance: RDS ON < 54mΩ @ VGS = 10V RDS(ON) < 72mΩ @ VGS = 4.5V

Contextual Info: Product specification DMN3150L N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR Features Mechanical Data • • • • • • • • • • Low On-Resistance: RDS ON < 54mΩ @ VGS = 10V RDS(ON) < 72mΩ @ VGS = 4.5V RDS(ON) < 115mΩ @ VGS = 2.5V

Contextual Info: DMN3150L N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR Features Mechanical Data • • • • • • • • • • Low On-Resistance: RDS ON < 54m @ VGS = 10V RDS(ON) < 72m @ VGS = 4.5V RDS(ON) < 115m @ VGS = 2.5V Low Gate Threshold Voltage Low Input Capacitance

DMN3150L

Abstract: DMN3150L-7
Contextual Info: DMN3150L N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR Please click here to visit our online spice models database. Features Mechanical Data • • • • • • • • • • Low On-Resistance: RDS ON < 54mΩ @ VGS = 10V RDS(ON) < 72mΩ @ VGS = 4.5V

Contextual Info: DMN3150L N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR Features Mechanical Data •          Low On-Resistance: • RDS ON < 54mΩ @ VGS = 10V • RDS(ON) < 72mΩ @ VGS = 4.5V  RDS(ON) < 115mΩ @ VGS = 2.5V Low Gate Threshold Voltage

72m transistor

Abstract: transistor marking 72m C2517 Q62702-C2517 SCT-595 marking PAs SCT-595
Contextual Info: BCP 72M PNP Silicon AF Power Transistor Preliminary data 4 • Drain switch for RF power amplifier stages • For AF driver and output stages 5 • High collector current • Low collector-emitter saturation voltage 3 2 1 VPW05980 Type Marking Ordering Code Pin Configuration

CEM4600

Abstract: TF36
Contextual Info: CEM4600 Dual Enhancement Mode Field Effect Transistor N and P Channel FEATURES 30V, 7.3A, RDS(ON) = 18mΩ (typ) @VGS = 10V. RDS(ON) = 26mΩ (typ) @VGS = 4.5V. -30V, -4.6A, RDS(ON) = 45mΩ (typ) @VGS = -10V. RDS(ON) = 72mΩ (typ) @VGS = -4.5V. Super high dense cell design for extremely low RDS(ON).

Contextual Info: CED4279/CEU4279 Dual Enhancement Mode Field Effect Transistor N and P Channel FEATURES D1/D2 40V , 14A , RDS(ON) = 32mΩ @VGS = 10V. RDS(ON) = 46mΩ @VGS = 4.5V. -40V , -9A , RDS(ON) = 72mΩ @VGS = 10V. RDS(ON) = 110mΩ @VGS = 4.5V. G1 G2 Super high dense cell design for extremely low RDS(ON).

Boundary Scan JTAG Logic

Contextual Info: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT PD44644184A-A, 44644364A-A 72M-BIT DDR II SRAM 4-WORD BURST OPERATION Description The μPD44644184A-A is a 4,194,304-word by 18-bit and the μPD44644364A-A is a 2,097,152-word by 36-bit synchronous double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor

pd446

Abstract: PD4464
Contextual Info: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT PD44644095A-A, 44644185A-A 72M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION Description The μPD44644095A-A is a 8,388,608-word by 9-bit and the μPD44644185A-A is a 4,194,304-word by 18-bit synchronous double data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor

HN58V1001TI-25E

Abstract: R1EX25256ATA00I renesas tcam tcam renesas cypress tcam idt tcam r1qaa7218rbg R1LV0816A M5M51008DFP-55H R1LV1616RBG-7SI
Contextual Info: 2009.04 Renesas General-Purpose Memory General Catalog www.renesas.com Highly Reliable Technological Innovation Ever faster, ever more power efficient…. Our advanced technology delivers To give your products the edge in today’s tough competitive higher quality and reliability,

BCP51

Abstract: BCP52 BCP53 BCP54 BCP54-10 BCP54-16 BCP55 BCP56 FA 5516 ScansUX40
Contextual Info: 71100213 OObflMö? BCP54 BCP55 BCP56 ÖTfl • P H I N 7 V SILICON PLANAR EPITAXIAL TRANSISTO RS Medium power npn transistors in a miniature plastic envelope intended for applications in thick and thin-film circuits. They are general purpose transistors, primarily designed for audio amplifier output

Contextual Info: SIEMENS BUZ 45 BUZ 45 A, BUZ 45 B SIPMOS Power Transistors • • N channel Enhancement mode Type Vos To ^DS on Package ’> Ordering Code BUZ 45 500 V 9.6 A 25 ”C 0.6 £2 TO-204 AA C67078-A1008-A8 BUZ 45 A 500 V 8.3 A 25 'C 0.8 n TO-204 AA C67078-A1008-A9

CY7C1441V33

Abstract: CY7C1443V33
Contextual Info: CY7C1441V33 CY7C1443V33 CY7C1447V33 PRELIMINARY 1M x 36/2M x 18/512K x 72 Flow-Thru SRAM Features inputs include all addresses, all data inputs, addresspipelining Chip Enable CE , Burst Control Inputs (ADSC, ADSP, and ADV), Write Enables (BWa, BWb, BWc, BWd,

Contextual Info: SuperSOT SOT23 PNP SILICON POWER SWITCHING TRANSISTORS FMMT717 FMMT718 FMMT720 FMMT722 FMMT723 ISSUE 3 JUNE 1996_ FEATURES * 625mW POWER DISSIPATION * * lc CONT 2.SA lc Up To 10A Peak Pulse Current * Excellent hfe Characteristics Up To 10A (pulsed)

CY7C1443V33

Abstract: CY7C1441V33
Contextual Info: CY7C1441V33 CY7C1443V33 CY7C1447V33 PRELIMINARY 1M x 36/2M x 18/512K x 72 Flow-through SRAM Features • Supports 133-MHz bus operations • 1M x 36/2M x 18/512K x 72 common I/O • Fast clock-to-output times — 6.5 ns for 133-MHz device — 7.5 ns (for 117-MHz device)

CY7C1444V33

Contextual Info: CY7C1444V33 CY7C1445V33 PRELIMINARY 1M x 36/2M x 18 Pipelined DCD SRAM Features • • • • • • • • • • • • • • • • Fast clock speed: 250, 200, and 167 MHz Provide high-performance 3-1-1-1 access rate Fast access time: 2.7, 3.0 and 3.5 ns

Contextual Info: CY7C1444V25 CY7C1445V25 PRELIMINARY 1M x 36/2M x 18 Pipelined DCD SRAM Features • • • • • • • • • • • • • • • • Fast clock speed: 300, 250, 200, and 167 MHz Provide high-performance 3-1-1-1 access rate Fast access time: 2.3, 2.7, 3.0 and 3.5 ns

Contextual Info: CY7C1447V25 CY7C1443V25 CY7C1441V25 PRELIMINARY 1M x 36/2M x 18/512K x 72 Flow-Thru SRAM Features inputs are gated by registers controlled by a positiveedge-triggered clock input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining Chip

CY7C1441V33

Abstract: CY7C1443V33
Contextual Info: CY7C1441V33 CY7C1443V33 CY7C1447V33 PRELIMINARY 1M x 36/2M x 18/512K x 72 Flow-through SRAM Features •Supports 133–MHz bus operations •1M x 36/2M x 18/512K x 72 common I/O •Fast clock–to–output times — 6.5 ns for 133–MHz device — 7.5 ns (for 117–MHz device)