73708 Search Results

OAK TECHNOLOGY

Abstract: oti-067 OTI067 OTI-077 oak technology oti 067 cga to vga Hercules Graphics Card oak oti-067 128x48 96x64
Contextual Info: OAK T E C H N O L O G Y INC SSE P • bV E ^ M O S 0 0 0 0 1 7 5 <333 H 0 A K T —T - £ 2 .- 3 3 - if 5 " Oak Technology Inc August 1991 O T T -0 7 7 Extended High Resolution VGA Graphics Controller with 1MByte Video Memory Support DESCRIPTION The OTI-077 is a highly integrated, single chip Extended High Resolution VGA Graphics Controller compatible with

OTI-087

Abstract: OTI-068 80386dx memory interfacing TL016 80386 chipset CHIPset for 80286 128x48 486 system bus 80386DX 80486
Contextual Info: OAK T E C HN O LO f i Y INC ¡¡¡¡E » • bTS^HOS 0000201 SSS »OAKT OAK TECHNOLOGY INC System Solutions in Silicon PRODUCT OVERVIEW O T I-0 8 7 LOCAL BUS VGA GRAPHICS CONTROLLER DESCRIPTION The OTI-OS7 is a highly integrated, single chip Local Bus Color Graphics Controller compatible with the IBM VGA standard.

pm-36

Abstract: PM-22 oak technology PM-44I PM-48TM PM-35 oak technology
Contextual Info: PM_44i_v4 3/20/00 1:53 PM Page 1 PROCESSOR TECHNOLOGY iDSP iRET iCODEC PM-44i Programmable Imaging DSP High-performance, low-cost peripheral imaging solution The PM-44i is a high-performance, programmable imaging digital signal processor DSP designed specifically for image processing

STR 6267

Abstract: str f 6267 str 6267 f str 5707 STR F 9208 L datasheet str 5707 STR D 5707 str 6853 F918 f4148
Contextual Info: DISTRIBUTORS July 1997 ALABAMA Hamilton Hallmark 4890 University Sq., #1 Huntsville, AL 35805 P#205/837-8700 F#205/830-2565 Marshall 3313 Memorial Pkwy So., 150 Huntsville, AL 35803 P#205/881-9235 F#205/881-1490 Pioneer 4835 University Square Huntsville, AL 35816

80386 chipset

Abstract: OTI-087 CHIPset for 80286 TL016 128x48 oak capacitance 640X480 8X16 CACHE MEMORY FOR 80386DX 160X64
Contextual Info: OAK T E C HN O LO f i Y INC ¡¡¡¡E » • bTS^HOS 0000201 SSS »OAKT OAK TECHNOLOGY INC System Solutions in Silicon PRODUCT OVERVIEW O T I-0 8 7 LOCAL BUS VGA GRAPHICS CONTROLLER DESCRIPTION The OTI-OS7 is a highly integrated, single chip Local Bus Color Graphics Controller compatible with the IBM VGA standard.

Contextual Info: £* 4-STAGE COUNTER/ SHIFTREGISTER SYNERGY SEMICONDUCTOR SY100S336 SY101S336 PRELIMINARY DESCRIPTION FEATURES The SY100/101S336 functions either as a modulo-16 up/down counter or as 4-bit bidirectional shift register and is designed for use in high performance E C L systems. Three Select inputs Sn

Contextual Info: & 8-BIT SYNCHRONOUS BINARY UP COUNTER SYNERGY SEMICONDUCTOR O TlUltUlD D ESCR IPTIO N FEATURES • 700 MHz Min. Count Frequency. The SY10E/100E/101E016 is a high-speed synchronous, presettable and cascadable 8-bit binary counter designed for use in new, high performance ECL systems. Architecture and operation

Contextual Info: *Q S Y 10E 122 V A /r n r v r 9 -B IT B U F F E R SY100E122 SEMICONDUCTOR S Y 1 01 E 1 2 2 D ESCRIPTIO N FEA TU R ES • 500 ps Max. Propagation Delay. ■ ESD protection of 2000V. ■ Fully compatible with industry standard 10KH, 100K I/O levels. ■ Extended supply voltage option for 100K I/O.

Contextual Info: 1K x 4 ECL RAM ^SYNERGY § Y 10 0 4 7 4 -7 SEMICONDUCTOR PRELIMINARY FEATURES • ■ Address access time, W : 5/7 ns max. ■ Chip select access time, tAc: 3/5 ns max. ■ Write pulse width, tww: 5/8 ns min. ■ Choice of two edge rates, 800/1500 ps typ.

Contextual Info: * ERROR DETECTION/ CORRECTIVE CIRCUIT SYNERG Y SEMICONDUCTOR |Y100E193 O i l U 1 1 1 y%3 D ESCRIPTIO N FEATURES The SY10E/100E/101E193 is an errordetection and correction EDAC circuit designed for use in new, high performance ECL systems. The E193 generates hamming parity codes on an 8 -bit

Contextual Info: •C* QUINT 2-INPUT OR/NOR GATE SYNERGY SEMICONDUCTOR SY100S302 SY101S302 PRELIMINARY FEATURES • ■ ■ ■ ■ ■ ■ 700 ps max. Propagation Delay. Enable to Output max. of 900 ps. I ee mln. of -4 5 mA. ESD protection of 2000 V. Industry standard 100K ECL levels.

Contextual Info: TRIPLE 4-INPUT MULTIPLEXER WITH ENABLE SYNERGY SEMICONDUCTOR SY100S371 SY101S371 ADVANCE INFORMATION DESCRIPTION FEATURES The SY100/101S371 is an ultra-fast triple, 4-input multiplexer with true and complementary outputs, designed for use in high performance ECL systems. The multiplexers are controlled by

Contextual Info: A S Y 10E 158 c v w w r v 5 - B IT 2 :1 M U L T IP L E X E R S Y 100E 158 SEMICONDUCTOR S Y 101 E 15 8 D ESCRIPTIO N FEATURES The SY10E/100E/101E158 offers five 2:1 multiplexers with differential outputs, designed for use in new, high performance ECL systems.

Contextual Info: «0« 8-BIT SHIFT REGISTER SEMICONDUCTOR DESCRIPTION FE A T U R E S The S Y 10E/100E/101E141 is an 8-bit, full-function shift register designed for use in new, high performance ECL systems. The E141 performs serial/parallel in and serial/parallel out, shifting in

Contextual Info: & 3-BIT REGISTERED BUS TRANSCEIVER SYNERGY SEMICONDUCTOR c v in n i^ R O Y I U1 tO O D DESCRIPTION FEATURES The SY10E/100E/101E336 offers three bus transceivers with both transmit and receive registers and is designed for use on new, high performance ECL systems. The bus outputs BUS0 BUS2 are designed to drive a 25 £2bus. The receive outputs (Q0

Flatpack 1500 48V

Contextual Info: SYNERGY 16-INPUT MULTIPLEXER SEMICONDUCTOR ADVANCE INFORMATION FEATURES • DESCRIPTION The SY100/101S364 Is a 16-input multiplexer, designed for use in high performance ECL systems. The four Data Select inputs So, S1f S2, S3 determine the bit from the 16 inputs (ln) that will be

Contextual Info: & 6-BIT REGISTER DIFF. DATA & CLOCK SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES • 1100 MHz Min. Toggle Frequency. The SY10E/100E/101E451 offers six D-type flip-flops with single-ended outputs and differential data and clock inputs and is designed for use in new, high performance ECL system. The

8211

Abstract: OTI-8211 microsparc RISC processor settop box block diagram ta 8211 CCIR601 "RF Demodulator" Ta561
Contextual Info: O T I-8 2 1 1 MPEG-2 Decoder for Digital Television Systems product _ features The OTI-8211 is a highly integrated, single-chip real-time decoder for video and audio decompression as well as demultiplexing of MPEG system level compressed data streams.

73708

Abstract: LM-1133 Widlar LM113 lm1082 2n2222 national semiconductor national 2n2222 2N2222 national AN-56 LM101A
Contextual Info: ࿒‫܈‬ց‫׋‬੗ᅜٗऺ໙ৗ༹࠶‫ڦ‬พटljएट‫ۉ‬უ‫ࠅڦ‬๕ਸ ᆅჾ ࿒‫܈‬ց‫׋‬ഋభܾट࠶๟ፌᅟᇀ๑ᆩ‫ۉڦ‬უएጚᇸă඗ ๔ླྀ‫ڞ‬Lj঳ࡕසူLj ܸLj࿒‫܈‬ց‫׋‬ഋభ࠶‫ڦ‬ፌ‫ۉگ‬უ๟6.2Vă‫߾ړ‬ፕ‫ۉ‬ᇸ‫ۉ‬უྺ

CLCC-8

Abstract: e104 synergy system SY100E104 SY101E104 SY10E104
Contextual Info: ^ QUINT 2-INPUT AND/NAND GATE SYNERGY S E M IC O N D U C T O R SY^00E104 OI iu it- D E S C R IP T IO N FEATURES • ■ ■ ■ ■ 600 ps Max. Propagation Delay. True and Complementary outputs. OR/NOR Function Outputs. ESD protection of 2000V. Fully compatible with Industry standard 10KH, 100K I/O

E155 multiplexer

Abstract: SY100E155 SY101E155 SY10E155
Contextual Info: S Y 1 0 E 1 5 5 * v S J N E R G 6 -B IT 2 :1 M U X -L A T C H S Y 1 0 0 E 1 5 5 Y S Y 1 0 1 E 1 5 5 SEM ICONDUCTO R D E S C R IP T IO N FEATURES • 750 ps max. LEN to Output. ■ ■ ■ ■ ■ ■ 700 ps max. D to Output. Single-ended outputs. Asynchronous Master Reset.

SY100E111

Abstract: SY101E111 SY10E111
Contextual Info: 1:2 DIFFERENTIAL Q vTnnFlÌÌ CLOCK DRIVER SY101E111 _ O T I U l 1^ I I I SYNERG Y S E M IC O N D U C T O R D E S C R IP T IO N FEATURES • T he S Y 1 0 E /1 0 0 E /1 0 1 E 1 11 is a low skew 1-to-9 differential driver, designed for clock distribution in new, high performance

SY100E167

Abstract: SY101E167 SY10E167
Contextual Info: ❖ SY10E167 SY100E167 SY101E167 6-BIT 2:1 MUX-REGISTER SYNERGY SEMICONDUCTOR D E S C R IP T IO N FEATURES • 1000 MHz min. operating frequency. ■ 800 ps max. Clock to Output. ■ Single-ended outputs. ■ Asynchronous Master Reset. ■ Dual Clocks. ■ ESD protection of 2000V.

E160

Abstract: SY100E160 SY10E160
Contextual Info: 12-BIT PARITY GENERATOR/CHECKER «e» SYNERG Y - ii jiir 'S M iir t i i r ' T n a SEMICONDUCTOR SY100E160 QY101E160 • l V / l I— I u u D E S C R IP T IO N FEATURES • Provides Odd-HIGH Parity of 12 Inputs. ■ Output register with Shift/Hold Capability.