74AC32 Search Results

74AC390

Abstract: 74AC54D 74ac841 74AC163 74AC393 74AC245 74AC670 74ac109 74AC623 74ACT640
Contextual Info: SELECTION GUIDE TC74AC/ACT Series Selection Guide NAND 74AC00 74ACTOO NOR 74AC02 74ACT02 AND 74AC08 74ACT08 OR 74AC32 74ACT32 INVERTER, BUFFER 74AC04 74ACT04 EXCLUSIVE OR 74AC86 74ACT86 GATE SCHMITT TRIGGER BUS BUFFER BUFFER BUS TRANSCEIVER 74AC10 74ACT10

74AC32

Abstract: 74AC 74AC32MTC 74AC32PC 74AC32SC 74AC32SJ 74ACT32 74ACT32SC ACT32 fairchild 74act32
Contextual Info: 74AC32, 74ACT32 Quad 2-Input OR Gate Features General Description • ICC reduced by 50% on 74AC only The AC32/ACT32 contains four, 2-input OR gates. ■ Outputs source/sink 24mA ■ ACT32 has TTL-compatible inputs Ordering Information Order Number Package

74AC32

Abstract: 74AC 74AC32MTC 74AC32PC 74AC32SC 74AC32SJ 74ACT32 74ACT32SC ACT32 74AC32 Fairchild
Contextual Info: Revised December 1998 74AC32 • 74ACT32 Quad 2-Input OR Gate General Description Features The AC/ACT32 contains four, 2-input OR gates. • ICC reduced by 50% on 74AC only ■ Outputs source/sink 24 mA ■ ACT32 has TTL-compatible inputs Ordering Code: Order Number

74ACT32

Contextual Info: _ Technical Data CD54/74AC32 CD54/74ACT32 Advance Information Quad 2-Input OR Gate Type Features: • Buffered inputs m Typical propagation delay: 4.5 ns @ V c c = 5 V, TA = 25°C, C l = 50 pF FUNCTIONAL DIAGRAM & TERMINAL ASSIGNMENT The RCA-CD54/74AC32 and CD54/74ACT32 quad 2-input

74ACT32

Abstract: D 711 N 67 T
Contextual Info: 37E D HARRIS SEMICOND SECTOR M3G2271 00253=17 7 B H A S _ Technical Data CD54/74AC32 C D 54/74A C T32 ' ~ f u v z .i Advance Information Quad 2-Input OR Gate Type Features: a Buttered inputs a Typical propagation delay: 4.5ns@ Vcc = 5V, 7a = 25° C, Ct = 50pF

Contextual Info: £3 National ÆM Semiconductor 54AC/74AC32 • 74ACT32 Quad 2-Input OR Gate General Description Features The 'AC/’ACT32 contains four, 2-input OR gates. • ■ ■ ■ Ice reduced by 50% on 54AC/74AC only Outputs source/sink 24 mA ’ACT32 has TTL-compatible inputs

74ac9

Contextual Info: CM CO S3 National Æ M Semiconductor 54AC/74AC32 • 54ACT/74ACT32 Quad 2-Input OR Gate General Description Features The 'AC/'ACT32 contains four, 2-input OR gales. • Outputs source/sink 24 mA ■ 'ACT32 has TTL-compatible inputs ■ Standard Military Drawing SMD

ACT32

Abstract: AC32 74ACT32
Contextual Info: AC32 • ACT32 54AC/74AC32 • 54ACT/74ACT32 Quad 2-Input OR Gate Connection Diagrams • Outputs Source/Sink 24 mA • ’ACT32 has TTL-Compatlble Inputs NC NC 'S [l H E Ï Ordering Code: See Section 6 [14] [ïs| ^61 NC 17 ] [18' NC Pin Assignment for LCC

74AC32

Abstract: 74AC 74AC32MTC 74AC32PC 74AC32SC 74AC32SJ 74ACT32 74ACT32SC ACT32 74AC32 Fairchild
Contextual Info: Revised November 1999 74AC32 • 74ACT32 Quad 2-Input OR Gate General Description Features The AC/ACT32 contains four, 2-input OR gates. • ICC reduced by 50% on 74AC only ■ Outputs source/sink 24 mA ■ ACT32 has TTL-compatible inputs Ordering Code: Order Number

74ac390

Abstract: 74AC393 74ACT640 74AC367 74AC245 74act540 74AC74 74AC04 74AC109 74ac126
Contextual Info: [2] TOSHIBA ft GATE BUFFER □ m mmi-K Ar -n pp NAND 74AC00 74ACT00 NOR 74AC02 74ACT02 AND 74AC08 74ACT08 OR 74AC32 74ACT32 INVERTER, BUFFER 74AC04 74ACT04 EXCLUSIVE OR 74AC86 74ACT86 SCHMITT TRIGGIER 74AC14 74ACT14 BUS BUFFER 74AC125 74AC126 74AC240 74ACT240 74AC244

AC32

Abstract: ACT32 CD54AC32F3A CD54ACT32F3A CD74AC32E CD74AC32M CD74ACT32E
Contextual Info: CD54/74AC32, CD54/74ACT32 Data sheet acquired from Harris Semiconductor SCHS230A Quad 2-Input OR Gate September 1998 - Revised May 2000 Features Description • Buffered Inputs The ’AC32 and ’ACT32 are quad 2-input OR gates that utilize Advanced CMOS Logic technology.

74AC323

Contextual Info: Technical Data CD54/74AC299, CD54/74AC323 CD54/74ACT299, CD54/74ACT323 n ÿ Te x a s In s t r u m e n t s Data sheet acquired from Harris Sem iconductor SC H S288 S O - 1 2 0 - v c c Ô Ë Ï - 2 19 — Q £ 2 - 3 ie - 0 S 7 | / 0 6 -

fairchild military

Abstract: AC32
Contextual Info: AC32 • ACT32 54AC/74AC32 • 54ACT/74ACT32 Quad 2-Input OR Gate Connection Diagrams • Outputs Source/Sink 24 mA • ’ACT32 has TTL-Compatible Inputs NC NC JÜ3 12 E Ï] Ordering Code: See S ection 6 Pin Assignment for LCC Pin Assignment for DIP, Flatpak and SOIC

Contextual Info: AC323 • ACT323 54AC/74AC323 • 54ACT/74ACT323 . 8-Bit Universal Shift/Storage Register W ith Synchronous Reset and Common I/O Pins Connection Diagrams Description The ’AC/’ACT323 is an 8-bit universal shift/storage register with 3-state outputs. Its function is similar

74ACT32

Contextual Info: _ Technical Data CD54/74AC32 CD54/74ACT32 Advance Information Quad 2-Input OR Gate Type Features: • Buffered inputs m Typical propagation delay: 4.5 ns @ Vcc - 5 V, T* = 25° C, CL = 50 pF FUNCTIONAL DIAGRAM & TERMINAL ASSIGNMENT The RCA-CD54/74AC32 and CD54/74ACT32 quad 2-input

AC323

Abstract: 74AC323
Contextual Info: AC323 • ACT323 54AC/74AC323 • 54ACT/74ACT323 8-Bit Universal Shift/Storage Register With Synchronous Reset and Common I/O Pins Connection Diagrams Description The ’AC/’ACT323 is an 8-bit universal shift/storage register with 3-state outputs. Its function is similar

Contextual Info: 54AC/74AC32 • 74ACT32 Quad 2-Input OR Gate General Description Features The ’A C /’ACT32 contains four, 2-input OR gates. • ■ ■ ■ Commercial Icc reduced by 50% on 54AC/74AC only Outputs source/sink 24 mA ’ACT32 has TTL-compatible inputs Standard Military Drawing SUD

74AC32

Contextual Info: ^ = T SGS-THOMSON n lsi S IIL[ÌCTIs! iD©S 74AC32 QUAD 2-INPUT OR GATE . HIGH SPEED: tPD = 4 ns (TYP.) atVcc =5V . LOW POWER DISSIPATION: Ice = 4 jjA (MAX.) at TA = 25 °C . HIGH NOISE IMMUNITY: V nih = V nil = 28% Vcc (MIN.) . 50i2 TRANSMISSION LINE DRIVING

Contextual Info: _ Technical Data CD54/74AC299, CD54/74AC323 CD54/74ACT299, CD54/74ACT323 Advance Information SO - 20 • V CC 5TÎ ÔE2 i/o 6 - 19 ■s 1 18 ■ DS7 I 7 - 07 I/0 4 - 16 • I/O7 i/0 2 l'0 0 - 15 - f 14 - I /O 3 QO - 13 - I / O1

74AC32

Abstract: 74AC32B 74AC32M AC32
Contextual Info: SGS-THOMSON 74AC32 M IM i[Li gïïlHΩiD(3S Q UAD 2-IN PU T OR GATE . . . . . . . • . HIGH SPEED: tPD = 4 ns (TYP.) at VCc = 5V LOW POWER DISSIPATION: Ice = 4 |xA (MAX.) at TA = 25 °C HIGH NOISE IMMUNITY: V nih = V nil = 28% Vcc (MIN.) 5 0 il TRANSMISSION LINE DRIVING

Contextual Info: AC323 • ACT323 54AC/74AC323 • 54ACT/74ACT323 8-Bit Universal Shift/Storage Register With Synchronous Reset and Common I/O Pins Connection Diagrams Description The ’AC/’ACT323 is an 8-bit universal shift/storage register with 3-state outputs. Its function is similar

DATE CODE FAIRCHILD 74AC

Abstract: 74AC 74AC32 74AC32MTC 74AC32SC 74AC32SJ 74ACT32 ACT32 M14A M14D
Contextual Info: Revised N ovem ber 1999 S E M IC O N D U C T G R T M 74AC32 • 74ACT3 2 Quad 2-Input OR Gate General Description Features The A C /AC T32 contains four, 2-input DR gates. • lc c reduced by 50% on 74A C only ■ O utputs source/sink 24 mA ■ A C T32 has TT L-com patible inputs

Contextual Info: AC323 • ACT323 54AC/74AC323 • 54ACT/74ACT323 8-Bit Universal Shift/Storage Register W ith Synchronous Reset and Common I/O Pins Description Connection Diagrams The ’AC/’ACT323 is an 8-bit universal shift/storage register with 3-state outputs. Its function is sim ilar

74AC32

Contextual Info: ^ = T S G S -T H O M S O N n lsi S IILICTIs! iD©S 74AC32 QUAD 2-INPUT OR GATE . HIGH SPEED: tPD = 4 ns (TYP.) atVcc =5V . LOW POWER DISSIPATION: Ice = 4 |xA (MAX.) at TA = 25 °C . HIGH NOISE IMMUNITY: V nih = V nil = 28% V cc (MIN.) . 50i2 TRANSMISSION LINE DRIVING