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    74AC11873 Price and Stock

    Texas Instruments 74AC11873J

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    Texas Instruments 74AC11873

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    Texas Instruments 74AC11873DWR

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    Texas Instruments 74AC11873NT

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    Texas Instruments 74AC11873DW

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    74AC11873 Datasheets (16)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF PDF Size Page count
    74AC11873
    		Texas Instruments DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS Original PDF 128KB 7
    74AC11873
    		Texas Instruments Dual 4-bit D-type Latch With 3-state Output Original PDF 92.42KB 7
    74AC11873D
    		Philips Semiconductors Scan PDF 345.27KB 12
    74AC11873DW
    		Texas Instruments 74AC11873 - Dual 4-Bit D-Type Latches With 3-State Outputs 28-SOIC -40 to 85 Original PDF 103.83KB 8
    74AC11873DW
    		Texas Instruments Dual 4-Bit D-type Latches With 3-State Outputs Original PDF 92.42KB 7
    74AC11873DW
    		Texas Instruments Dual 4-Bit D-Type Latches With 3-State Outputs 28-SOIC -40 to 85 Original PDF 124.25KB 10
    74AC11873DW
    		Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF 39.07KB 1
    74AC11873DW
    		Texas Instruments DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS Scan PDF 165.72KB 6
    74AC11873DW
    		Texas Instruments DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS Scan PDF 149.26KB 5
    74AC11873DWR
    		Texas Instruments 74AC11873 - IC AC SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO28, PLASTIC, SOIC-28, Bus Driver/Transceiver Original PDF 103.83KB 8
    74AC11873N
    		Philips Semiconductors Scan PDF 345.27KB 12
    74AC11873NT
    		Texas Instruments 74AC11873 - Dual 4-Bit D-Type Latches With 3-State Outputs 28-PDIP -40 to 85 Original PDF 103.83KB 8
    74AC11873NT
    		Texas Instruments Dual 4-Bit D-type Latches With 3-State Outputs Original PDF 92.42KB 7
    74AC11873NT
    		Texas Instruments Dual 4-Bit D-Type Latches With 3-State Outputs 28-PDIP -40 to 85 Original PDF 124.25KB 10
    74AC11873NT
    		Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF 39.07KB 1
    74AC11873NT
    		Texas Instruments DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS Scan PDF 149.26KB 5

    74AC11873 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    74AC11873

    Contextual Info: 54AC11873, 74AC11873 DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS • 54A C 11 8 73 . . . J T P A C K A G E 3-State Buffer-Type Outputs Drive Bus 74AC 11B73 . . . D W OR N T P A C K A G E Lines Directly TOP V IE W • Bus-Structured Pinout • Flow -Through A rchitecture O ptim izes PCB


    OCR Scan     		54AC11873, 74AC11873 11B73 500-m D3390, PDF

    74AC11873

    Contextual Info: 74AC11873 DUAL 4ĆBIT DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS ăą SCAS095 − JANUARY 1990 − REVISED APRIL 1993 • • • • • • DW PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture Optimizes


    Original     		SCAS095 74AC11873 500-mA PDF

    74AC11873

    Contextual Info: 74AC11873 DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS095 – JANUARY 1990 – REVISED APRIL 1993 • • • • • • DW PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture Optimizes


    Original     		74AC11873 SCAS095 500-mA 74AC11873 PDF

    74AC11873

    Contextual Info: 74AC11873 DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS D3398, JANUARY 1990 - R E V IS E D APRIL 1993 • ■ * 3-State Buffer-Type Outputs Drive Bus Lines Directly I * Bus-Structured Pinout V I * Flow-Through Architecture Optimizes PCB Layout DW PACKAGE {TOP VIEW


    OCR Scan     		74AC11873 D3398, 500-mA 74AC11873 PDF

    74AC11873

    Contextual Info: 74AC11873 DUAL 4ĆBIT DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS ăą SCAS095 − JANUARY 1990 − REVISED APRIL 1993 • • • • • • DW PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture Optimizes


    Original     		74AC11873 SCAS095 500-mA 74AC11873 PDF

    74AC11873

    Contextual Info: 74AC11873 DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS095 – JANUARY 1990 – REVISED APRIL 1993 • • • • • • DW PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture Optimizes


    Original     		74AC11873 SCAS095 500-mA PDF

    1D11D

    Abstract: 74AC11873
    Contextual Info: 54AC11873, 74AC11873 DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS TI016 7 -0 3 3 9 6 , MARCH 1980 • 3-S tate B uffer-Type O utputs Drive Bus Lines D irectly • Bus-Structured Pinout • Flow -Through A rchitectu re to O ptim ize PCB Layout • Center-Pin V q C and GND C onfigurations to


    OCR Scan     		54AC11873, 74AC11873 TI016 500-m 300-m 54AC11873 1D11D PDF

    74AC11873

    Contextual Info: TEXAS INSTR LOGIC 31E 3> ^ , 1/ 1 2 3 o a a ^ a s D a 54AC11873, 74AC11873 DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS ,v , 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture to Optimize PCB Layout 7 _T10167— D3398, MARCH 1990


    OCR Scan     		54AC11873, 74AC11873 T10167â D3398, S4AC11873 500-mA 300-mil 74AC11873 PDF

    74AC11873

    Contextual Info: TEXAS INSTR LOGIC .0Tb 1723 OGÔ^ÜSD Ô 31E D ,1/ T 54AC11873, 74AC11873 DUAL 4-B1T D-TYPE LATCHES WITH 3-STATE OUTPUTS rv i _T10167— D3398, MARCH 1990 - 54AC11873 . . . JT PACKAGE 74AC11873 . . . DW OR NT PACKAGE (TOP VIEW) • 3-State Buffer-Type Outputs Drive Bus Lines


    OCR Scan     		54AC11873, 74AC11873 T10167â D3398, 500-mA 300-mil 7s265 PDF

    74AC11873

    Contextual Info: 74AC11873 DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS095 – JANUARY 1990 – REVISED APRIL 1993 • • • • • • DW PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture Optimizes


    Original     		74AC11873 SCAS095 500-mA PDF

    74AC11873

    Contextual Info: 74AC11873 DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS095 – JANUARY 1990 – REVISED APRIL 1993 • • • • • • DW PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture Optimizes


    Original     		74AC11873 SCAS095 500-mA 74AC11873 PDF

    74AC11873

    Contextual Info: 74AC11873 DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS095 – JANUARY 1990 – REVISED APRIL 1993 • • • • • • DW PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture Optimizes


    Original     		74AC11873 SCAS095 500-mA PDF

    74AC11873

    Contextual Info: 74AC11873 DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS D3398, JANUARY 1990 - REVISED APRIL 1993 3-State Buffer-iype Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture Optimizes PCB Layout Center-PIn Vcc and GND Configurations


    OCR Scan     		74AC11873 D3398, 500-mA PDF

    74AC11873

    Abstract: st zo 607
    Contextual Info: 74AC11873 DUAL 4-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS D3398, JANUARY 1990 - REVISED APRIL 1933 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture Optimizes PCB Layout DW PACKAGE {TOP VIEW U 1LE[ 1Q1 [ 2 28 .


    OCR Scan     		74AC11873 D3398, 500-mA st zo 607 PDF

    74AC11873

    Contextual Info: 74AC11873 DUAL 4ĆBIT DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS ăą SCAS095 − JANUARY 1990 − REVISED APRIL 1993 • • • • • • DW PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture Optimizes


    Original     		SCAS095 74AC11873 500-mA PDF

    74AC11873

    Contextual Info: 74AC11873 DUAL 4ĆBIT DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS ăą SCAS095 − JANUARY 1990 − REVISED APRIL 1993 • • • • • • DW PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture Optimizes


    Original     		SCAS095 74AC11873 500-mA PDF

    74AC11873

    Contextual Info: 74AC11873 DUAL 4ĆBIT DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS ăą SCAS095 − JANUARY 1990 − REVISED APRIL 1993 • • • • • • DW PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture Optimizes


    Original     		SCAS095 74AC11873 500-mA PDF

    74AC11873

    Abstract: 74AC11873NT 74AC11873DW
    Contextual Info: 74AC11873 DUAL 4ĆBIT DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS ăą SCAS095 − JANUARY 1990 − REVISED APRIL 1993 • • • • • • DW PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture Optimizes


    Original     		74AC11873 SCAS095 500-mA 74AC11873 74AC11873NT 74AC11873DW PDF

    74AC11873

    Abstract: 74ACT11873
    Contextual Info: 54AC11873,74AC11873 DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS D3398, JANUARY 1990 3-State Buffer-Type Outputs Drive Bus Lines Directly * 5 4 A C 11 8 73 . . . J T P A C K A G E 74A C 11 8 73 . . . D W O R N T P A C K A G E TOP V IE W Bus-Structured Pinout


    OCR Scan     		54AC11873 74AC11873 D3398, 500-mA 300-mil 54AC11873, 74ACT11873 PDF

    74ACT11014

    Abstract: 74AC11014 74AC11014D 74AC11014N 74ACT11014D 74ACT11014N AC11014 ACT11014 74ACT11873 74AC11873
    Contextual Info: Philips Components—Signetics Document No. 853-1487 ECN No. 00730 Date of Issue O c to b e r 17, 1990 Status Product Specification AC11014 : Product Specification ACT11014 : Objective Specification A C L P ro d u cts QUICK REFERENCE DATA FEATURES • O u tp u t c a p a b ility : ± 2 4 m A


    OCR Scan     		AC11014 ACT11014 74AC/ACT11014 10MHz 74ACT11014 74AC11014 74AC11014D 74AC11014N 74ACT11014D 74ACT11014N AC11014 ACT11014 74ACT11873 74AC11873 PDF

    74ACT11873

    Abstract: 74AC11873
    Contextual Info: Philips Components—Signetics 74AC/ACT11873 Document No. ECN No. Date of Issue October 1 7 ,1 9 9 0 Status Preliminary Specification Dual 4-bit D-type transparent latch with clear 3-State A C L Prod ucts QUICK REFERENCE DATA FEATURES • 3-State output buffers


    OCR Scan     		74AC/ACT11873 74ACT11873 74AC11873 PDF