74AC11874 Search Results
74AC11874 Datasheets (12)
Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
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74AC11874 |
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DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH 3-STATE OUTPUTS | Original | 97.8KB | 6 | ||
74AC11874D |
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5 V, dual 4-bit D-type edge-trigger flip-flop with clear (3-state) | Scan | 205.72KB | 7 | ||
74AC11874DW |
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74AC11874 - Dual 4-Bit D-Type Edge-Triggered Flip-Flops With 3-State Outputs 28-SOIC -40 to 85 | Original | 108.69KB | 7 | ||
74AC11874DW |
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Dual 4-Bit D-type Edge-triggered Flip-flops With 3-State Outputs | Original | 97.8KB | 6 | ||
74AC11874DW |
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Dual 4-Bit D-Type Edge-Triggered Flip-Flops With 3-State Outputs 28-SOIC -40 to 85 | Original | 118.88KB | 8 | ||
74AC11874DW |
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DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS | Scan | 153.58KB | 5 | ||
74AC11874DWR |
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74AC11874 - IC AC SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO28, PLASTIC, SOIC-28, Bus Driver/Transceiver | Original | 108.69KB | 7 | ||
74AC11874N |
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5 V, dual 4-bit D-type edge-trigger flip-flop with clear (3-state) | Scan | 205.72KB | 7 | ||
74AC11874NT |
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74AC11874 - Dual 4-Bit D-Type Edge-Triggered Flip-Flops With 3-State Outputs 28-PDIP -40 to 85 | Original | 108.69KB | 7 | ||
74AC11874NT |
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Dual 4-Bit D-type Edge-triggered Flip-flops With 3-State Outputs | Original | 97.8KB | 6 | ||
74AC11874NT |
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Dual 4-Bit D-Type Edge-Triggered Flip-Flops With 3-State Outputs 28-PDIP -40 to 85 | Original | 118.88KB | 8 | ||
74AC11874NT |
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DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS | Scan | 153.58KB | 5 |
74AC11874 Price and Stock
Rochester Electronics LLC SN74AC11874NT74AC11874 - DUAL 4-BIT D-TYPE ED |
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Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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SN74AC11874NT | Bulk | 145 |
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Texas Instruments SN74AC11874NTDual 4-Bit D-Type Edge-Triggered Flip-Flops With 3-State Outputs |
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SN74AC11874NT | 1,061 | 1 |
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Texas Instruments 74AC11874DWRPeripheral ICs |
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74AC11874DWR | 1,337 |
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Texas Instruments 74AC11874NPeripheral ICs |
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74AC11874N | 964 |
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Texas Instruments 74AC11874JPeripheral ICs |
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74AC11874J | 832 |
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74AC11874 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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74AC11874Contextual Info: 74AC11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH 3-STATE OUTPUTS SCAS236 – MARCH 1990 – REVISED APRIL 1993 • • • • • • • DW OR NT PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Asynchronous Clear Flow-Through Architecture Optimizes PCB |
Original |
74AC11874 SCAS236 500-mA 300-mil 74AC11874 | |
Contextual Info: 74AC11874 DUAL 4ĆBIT DĆTYPE EDGEĆTRIGGERED FLIPĆFLOP WITH 3ĆSTATE OUTPUTS SCAS236 − MARCH 1990 − REVISED APRIL 1993 • • • • • • • DW OR NT PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Asynchronous Clear Flow-Through Architecture Optimizes PCB |
Original |
74AC11874 SCAS236 500-mA 300-mil | |
Contextual Info: 54AC11874,74AC11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS _ D3446, MARCH 1990-REVISED OCTOBER 1990 3-State Buffer-Type Outputs Drive Bus Lines Directly 54AC11874 . . JT PACKAGE 74AC11874 . . DW OR NT PACKAGE {TOP VIEW |
OCR Scan |
54AC11874 74AC11874 D3446, 1990-REVISED 54AC11874 500-mA PR00UCT | |
54AC11874
Abstract: 74*874 74AC11874 AC1187
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OCR Scan |
54AC11874, 74AC11874 D3446, 1990-REVISEO 500-mA 300-mil 54AC11874 74AC11874 54AC11874 74*874 AC1187 | |
Contextual Info: 74AC11874 DUAL 4ĆBIT DĆTYPE EDGEĆTRIGGERED FLIPĆFLOP WITH 3ĆSTATE OUTPUTS SCAS236 − MARCH 1990 − REVISED APRIL 1993 • • • • • • • DW OR NT PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Asynchronous Clear Flow-Through Architecture Optimizes PCB |
Original |
74AC11874 500-mA 300-mil SCAS236 | |
Contextual Info: 74AC11874 DUAL 4ĆBIT DĆTYPE EDGEĆTRIGGERED FLIPĆFLOP WITH 3ĆSTATE OUTPUTS SCAS236 − MARCH 1990 − REVISED APRIL 1993 • • • • • • • DW OR NT PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Asynchronous Clear Flow-Through Architecture Optimizes PCB |
Original |
74AC11874 500-mA 300-mil SCAS236 | |
74AC11874Contextual Info: 74AC11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH 3-STATE OUTPUTS SCAS236 – MARCH 1990 – REVISED APRIL 1993 • • • • • • • DW OR NT PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Asynchronous Clear Flow-Through Architecture Optimizes PCB |
Original |
74AC11874 SCAS236 500-mA 300-mil 74AC11874 | |
Contextual Info: 74AC11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH 3-STATE OUTPUTS SCAS236 – MARCH 1990 – REVISED APRIL 1993 • • • • • • • DW OR NT PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Asynchronous Clear Flow-Through Architecture Optimizes PCB |
Original |
74AC11874 SCAS236 500-mA 300-mil | |
Contextual Info: 74AC11874 DUAL 4ĆBIT DĆTYPE EDGEĆTRIGGERED FLIPĆFLOP WITH 3ĆSTATE OUTPUTS SCAS236 − MARCH 1990 − REVISED APRIL 1993 • • • • • • • DW OR NT PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Asynchronous Clear Flow-Through Architecture Optimizes PCB |
Original |
74AC11874 500-mA 300-mil SCAS236 | |
74AC11874
Abstract: 74AC11874DW 74AC11874NT
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Original |
74AC11874 SCAS236 500-mA 300-mil 74AC11874 74AC11874DW 74AC11874NT | |
Contextual Info: 74AC11874 DUAL 4ĆBIT DĆTYPE EDGEĆTRIGGERED FLIPĆFLOP WITH 3ĆSTATE OUTPUTS SCAS236 − MARCH 1990 − REVISED APRIL 1993 • • • • • • • DW OR NT PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Asynchronous Clear Flow-Through Architecture Optimizes PCB |
Original |
74AC11874 500-mA 300-mil SCAS236 | |
Contextual Info: 54AC11874, 74AC11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS TI0178— D3446, M A R C H 1990 54AC11674 . JT P A C K A G E 74AC11674 . D W O R NT P A C K A G E • 3-State Buffer-Type Outputs Drive Bus>Llnes Directly TOP VIEW |
OCR Scan |
54AC11874, 74AC11874 TI0178-- D3446, 500-mA 300-mil 54AC11674 74AC11674 54AC11874 C11874 | |
Contextual Info: 74AC11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH 3-STATE OUTPUTS SCAS236 – MARCH 1990 – REVISED APRIL 1993 • • • • • • • DW OR NT PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Asynchronous Clear Flow-Through Architecture Optimizes PCB |
Original |
74AC11874 SCAS236 500-mA 300-mil | |
Contextual Info: 54AC11874, 74AC11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS _ D3446, MARCH 1990 R EVISED O CTO BER 1990 54A C 11874 . . . J T P A C K A G E 3-State Buffer-Type O utputs Drive Bus 7 4A C 11 8 74 . . . DW OR N T P A C K A G E |
OCR Scan |
54AC11874, 74AC11874 D3446, 500-m | |
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Contextual Info: 74AC11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOP WITH 3-STATE OUTPUTS SCAS236 – MARCH 1990 – REVISED APRIL 1993 • • • • • • • DW OR NT PACKAGE TOP VIEW 3-State Buffer-Type Outputs Drive Bus Lines Directly Asynchronous Clear Flow-Through Architecture Optimizes PCB |
Original |
74AC11874 SCAS236 500-mA 300-mil | |
74AC11874D
Abstract: 74AC11874N 74ACT11874D 74ACT11874N
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OCR Scan |
AC/ACT11874 74AC/ACT11874 500ft 10MHz 74AC11874D 74AC11874N 74ACT11874D 74ACT11874N | |
Contextual Info: Philips Components— Signetics 74AC/ACT11874 Document No. ECN No. Date of Issue October 17,1990 Status Preliminary Specification Dual 4-bit D-type edge-triggered flip-flop with clear 3-State A C L Products QUICK REFERENCE DATA FEATURES • 3-State output buffers |
OCR Scan |
74AC/ACT11874 |