74ALS8 Search Results

SN54AS808B

Abstract: SN74AS808B 54ALS808
Contextual Info: SN 54ALS808A, SN 54AS808B, SN 74ALS808A, SN 74 AS808 B HEX 2-INPUT AND DRIVERS D 2 6 6 1 , DECEMBER 1 9 8 2 - S N 5 4 A L S 8 0 8 A , S N 5 4 A S 8 0 8 B . . . J P AC K A G E S N 7 4 A L S 8 0 8 A , S N 7 4 A S 8 0 8 B . . . D W OR N P AC KA G E High Capacitive Drive Capability

D0-15L

Abstract: LS74AD
Contextual Info: 7 z1 % > -'0 '7 -¿ ? S ' M 74ALS873AP ¡C' 3< DUAL 4 -B IT D-TYPE TRANSPARENT LATCH W ITH 3-STATE OUTPUT NONINVERTED 50t° CDGTL LOGIC) DESCRIPTION PIN CONFIGURATION (TOP VIEW) DIR EC T RESET , p " IN P U T I M ° O UTPUT } -q C O N TR O L IN PU T E c

Contextual Info: Philips Sem iconductors Product specification Quad 2-input exclusive-OR gate 74ALS86 DESCRIPTION PIN CONFIGURATION The 74ALS86 contain four independent 2-input Exclusive-OR gates. A comm on application is a true/com plem ent element. If one input is held Low, the signal on the other input will be reproduced in true

74AS857

Abstract: 74als857 54AS857 54ALS857 LTA 703 S 74als85 74as85
Contextual Info: SN 54ALS857, SN 54AS857, SN 74ALS857, SN 74AS857 HEX 2-T0-1 UNIVERSAL MULTIPLEXERS D 2 6 6 1 , DECEMBER 1 9 8 2 - SN 54A LS857, S N 54A S857 . . . JT PACKAGE SN 74ALS857, S N 74A S857 . . . DW OR NT PACKAGE • S elects True or C om p le m en tary Data •

74ALS131

Abstract: 74ALS573AD
Contextual Info: 7 = ^ ce v -y -0 7 ' -^ S ' MITSUBISHI ALSTTLs M 74ALS874AP .< „c X '8n DUAL 4 -B IT D -T Y P E EDGE-TRIGGERED FLIP-FLO P _ W IT H 3 -S T A T E O U TPU T N O N IN V E R T E D 0249827 MITSUBISHI ÌOGTL LOGIC) DESCRIPTION The M 74ALS874AP Is a sem iconductor integrated circuit

74ALS857

Abstract: 54als657 74AS857
Contextual Info: SN 54ALS857, SN 54AS857, SN 74ALS857, SN 74AS857 HEX 2-T0-1 UNIVERSAL M ULTIPLEXERS D 2 6 6 1 , DECEMBER 1 9 8 2 - - REVISED M A Y 1986 SN 54A LS857, S N 54A S857 . . . JT PACKAGE SN 74A LS857, S N 74A S857 . . . DW OR NT PACKAGE S elects True or C om p le m en tary Data

SN74ALS86M

Contextual Info: T Y P ES SN S4ALS8 6, SN 74ALS8 6 QU AD RUPLE 2-INPUT EXC LU SIVE OR G A TES D 2 6 6 1 , APRIL 1 9 8 2 -R E V IS E D DECEMBER 1 9 8 3 S N 5 4 A L S 8 6 . . . J PACKAGE Package Options Include Both Plastic and Ceramic Chip Carriers in Addition to Plastic and Ceramic DIPs

MS-012-AB

Abstract: 74ALS 74ALS86 74ALS86D 74ALS86N SOL-24 TEXTOOL zif socket Scans-0010873
Contextual Info: Signetics 74ALS86 Quad 2-Input Exclusive-OR Gates Product Specification ALS Products DESCRIPTION Th ese devices contain four independent 2input E xclusive-O R gates. A com m on application is a true/com plem ent elem ent. If one input is held Low, the signal on the

SN54ALS878A

Abstract: SN54ALS879A SN54AS878 SN54AS879 SN74ALS878A SN74ALS879A SN74AS878 SN74AS879
Contextual Info: S N 54A LS 878A , S N 54A LS 879A , S N 54A S 878. SN 54A S 879 SN 74ALS878A, S N 74A LS 879A . S N 74A S 878, S N 74A S 879 DUAL 4 BIT D TYPE EDGE TRIGGERED FLIP FLOPS W ITH 3 STATE OUTPUTS D 2 6 6 1 . A P R IL 1 9 8 2 3-State Bus Driving Outputs Full Parallel-Access for Loading

SOT27-1 DIP14

Abstract: 74als86 pin diagram 74ALS 74ALS86 74ALS86D 74ALS86N
Contextual Info: INTEGRATED CIRCUITS 74ALS86 Quad 2-Input exclusive-OR gate Product specification IC05 Data Handbook Philips Semiconductors 1996 Jul 01 Philips Semiconductors Product specification Quad 2-input exclusive-OR gate 74ALS86 DESCRIPTION PIN CONFIGURATION The 74ALS86 contain four independent 2-input Exclusive-OR gates.

74ALS879

Abstract: LS879 74ALS87
Contextual Info: -p~¥Ù> -O 'y-Q 'z rW •• ^ V "“ M 74ALS879AP DUAL 4 -B IT D-TYPE EDGE-TRIGGERED FLIP-FLOP W ITH 3-STATE OUTPUT AND SYNCHRONOUS RESET INVERTED 6249827 MITSUBISHI (DGTL LOGIC) DESCRIPTION The 74ALS879AP is a semiconductor Integrated circuit consisting of two 4-bit D-type positive edge-triggered

74ALS86M

Contextual Info: Philips Semiconductors Product specification Quad 2-input exclusive-OR gate 74ALS86 DESCRIPTION PIN CONFIGURATION The 74ALS86 contain four independent 2-input Exclusive-OR gates. A common application is a true/complement element, if one input is held Low, the signal on the other input will be reproduced in true

54AS832

Abstract: 74As832
Contextual Info: PRODUCT PREVIEW SN 54A LS 832A , SIU54AS832B, S N 74 A LS 8 32A , S N 74 A S832 B HEX 2-INPUT OR DRIVERS D 2 6 6 1 , OEC EM B ER 1982 - R E V ISE D M A Y 1986 High Capacitive Drive Capability S N 5 4 A L S 8 3 2 A , S N 5 4 A S 8 3 2 B . . . J P AC KA G E

Contextual Info: 74ALS874B, 74ALS876A, SN74AS874, SN74AS876 SN54ALS874B, SN54AS874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS D2661. APRIL 1982 - REVISED MAY 198$ 3-State Buffer-Type Outputs Drive Bus-Lines Directly S N 5 4A LS 8 74 B , S N 5 4 A S 8 7 4 . . . J T PACKAGE

74AS843

Abstract: 74AS844 74ALS844 LS844 74ALS843
Contextual Info: SN 54ALSB43, SN 54A S843, SN 54A LS844, SN 54 A S844 SN 74ALSB43, SN 74A S843, SN 74A LS844, SN 74 A S844 9 BIT BUS INTERFACE D TYPE LATCHES WITH 3 STATE OUTPUTS D 2 9 1 0 , DECEMBER 1 9 8 3 - 3-S tate Buffer-Type Outputs Drive Bus-Llnes Directly REVISED M A Y 1 9 8 6

74als632

Abstract: SN74ALS632 74ALS633 74ALS635 54ALS635 2431A
Contextual Info: TYPES SN54ALS632 THRU SN54ALS635, SN74ALS632 THRU SN74ALS635 32-BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS D 2661, DECEMBER 1982-REVISED DECEMBER 1983 'A L S 6 3 2 , 'A L S 6 3 3 ,. . . JO P A C K A G E TO P V IE W Detects and Corrects Single-Bit Errors

74als880

Abstract: SN54AS880A LS880
Contextual Info: TYPES SN54ALSB80, SN54AS880, 74ALS880. SN74AS880 DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS D2661, DECEMBER 1982-REVISED DECEMBER 1983 • 3-State Buffer-Type Outputs Drive Bus-Lines Directly • Bus-Structured Pinout 'A L S 8 7 3 Is Alternative Version w ith Noninverting

Contextual Info: TC74VHC86F/FT/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC86F,TC74VHC86FT,TC74VHC86FK Quad Exclusive OR Gate TC74VHC86F The TC74VHC86 is an advanced high speed CMOS QUAD EXCLUSIVE OR GATE fabricated with silicon gate C2MOS technology.

74ALS86

Abstract: TC74VHC86F TC74VHC86FK TC74VHC86FT
Contextual Info: TC74VHC86F/FT/FK 東芝CMOSデジタル集積回路 シリコン モノリシック TC74VHC86F,TC74VHC86FT,TC74VHC86FK Quad Exclusive OR Gate TC74VHC86 はシリコンゲート CMOS 技術を用いた超高速 CMOS エクスクルーシブ OR ゲートです。CMOS の特長である低い

TC74VHC86FT

Abstract: 74ALS86 TC74VHC86F TC74VHC86FN
Contextual Info: TC74VHC86F/FN/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC86F,TC74VHC86FN,TC74VHC86FT Quad Exclusive OR Gate The TC74VHC86 is an advanced high speed CMOS QUAD EXCLUSIVE OR GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

SN74ALS880A

Contextual Info: SN54ALS880A, SN54AS880, 74ALS880A, SN74AS880 D U A L 4-BIT D T Y P E L A T C H E S W ITH 3 S T A T E O U T P U T S D 2 6 6 1 , DECEMBER 1 9 8 2 - REVISED M A Y 1 9 8 6 S N 54A LS880A, S N 54A S880 JT PACKAGE S N 74A LS880A. S N 74A S880 . . . DW OR NT PACKAGE

SN74AS841

Contextual Info: SN54ALS841, SN54AS841, SN54ALS842, SIU54AS842 74ALS841, SN74AS841, 74ALS842, SN74AS842 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS D 2 9 1 0 , DECEMBER 1 9 8 3 - TO P VIEW Bus-Structured Pinout oc C ' 1D C 2 Provide Extra Bus Driving Latches

MC68322FT20

Abstract: bitblt s3 RGP 30 H1
Contextual Info: MC68322 Integrated Printer Processor User’s Manual Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and

EATON CM20A

Abstract: A5 GNE mosfet Hall sensor 44e 402 2N8491 FTG 1087 S TRIAC BCR 10km FEB3T smd transistor marking 352a sharp EIA 577 sharp color tv schematic diagram MP-130 M mh-ce 10268
Contextual Info: Table of Contents N E W A R K E L E C T R O N IC S “Where serving you begins even before you call” Newark Electronics is a UNIQUE broadline distributor of electronic components, dedicated to provid­ ing complete service, fast delivery and in-depth inventory. Our main