74AUP1G57GW Search Results

74AUP1G57

Abstract: 74AUP1G57GF 74AUP1G57GM 74AUP1G57GW JESD22-A114-C transistor VT 209 M CDM 12.6 Philips
Contextual Info: 74AUP1G57 Low-power configurable multiple function gate Rev. 01. — 16 January 2006 Preliminary data sheet 1. General description The 74AUP1G57 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Contextual Info: 74AUP1G57 Low-power configurable multiple function gate Rev. 5 — 25 November 2011 Product data sheet 1. General description The 74AUP1G57 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,

74AUP1G57

Abstract: 74AUP1G57GF 74AUP1G57GM 74AUP1G57GW
Contextual Info: 74AUP1G57 Low-power configurable multiple function gate Rev. 4 — 20 July 2010 Product data sheet 1. General description The 74AUP1G57 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,

74AUP1G57

Abstract: 74AUP1G57GF 74AUP1G57GM 74AUP1G57GW JESD22-A114E
Contextual Info: 74AUP1G57 Low-power configurable multiple function gate Rev. 03 — 22 June 2009 Product data sheet 1. General description The 74AUP1G57 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,

Contextual Info: 74AUP1G57 Low-power configurable multiple function gate Rev. 6 — 15 August 2012 Product data sheet 1. General description The 74AUP1G57 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,

74AUP1G57

Abstract: 74AUP1G57GF 74AUP1G57GM 74AUP1G57GW JESD22-A114D
Contextual Info: 74AUP1G57 Low-power configurable multiple function gate Rev. 01 — 23 November 2006 Product data sheet 1. General description The 74AUP1G57 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

74AUP1G57

Abstract: 74AUP1G57GF 74AUP1G57GM 74AUP1G57GW JESD22-A114E
Contextual Info: 74AUP1G57 Low-power configurable multiple function gate Rev. 02 — 23 March 2009 Product data sheet 1. General description The 74AUP1G57 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,

Contextual Info: 74AUP1G57 Low-power configurable multiple function gate Rev. 6 — 15 August 2012 Product data sheet 1. General description The 74AUP1G57 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,