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    74AUP2G32GM Search Results

    74AUP2G32GM Datasheets (4)

    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    74AUP2G32GM
    NXP Semiconductors Low-power dual 2-input OR gate Original PDF 85.85KB 17
    74AUP2G32GM
    NXP Semiconductors 74AUP2G32 - IC AUP/ULP/V SERIES, DUAL 2-INPUT OR GATE, PQCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, PLASTIC, MO-255, SOT902-1, QFN-8, Gate Original PDF 289.7KB 21
    74AUP2G32GM,125
    NXP Semiconductors Low-power dual 2-input OR gate; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse Original PDF 85.85KB 17
    74AUP2G32GM,125
    NXP Semiconductors 74AUP2G32 - IC AUP/ULP/V SERIES, DUAL 2-INPUT OR GATE, PQCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, PLASTIC, MO-255, SOT902-1, QFN-8, Gate Original PDF 289.7KB 21
    SF Impression Pixel

    74AUP2G32GM Price and Stock

    Nexperia

    Nexperia 74AUP2G32GM,125

    IC GATE OR 2CH 2-INP 8XQFN
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey () 74AUP2G32GM,125 Cut Tape 150 1
    • 1 $0.48
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    • 100 $0.26
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    74AUP2G32GM,125 Digi-Reel 150 1
    • 1 $0.48
    • 10 $0.33
    • 100 $0.26
    • 1000 $0.26
    • 10000 $0.26
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    74AUP2G32GM,125 Reel
    • 1 -
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    Rochester Electronics 74AUP2G32GM,125 128,000 1
    • 1 -
    • 10 -
    • 100 $0.11
    • 1000 $0.09
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    74AUP2G32GM Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 6 — 5 June 2012 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    74AUP2G32 74AUP2G32 PDF

    Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 6 — 5 June 2012 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    74AUP2G32 74AUP2G32 PDF

    74AUP2G32

    Abstract: 74AUP2G32DC
    Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 4 — 21 October 2010 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    74AUP2G32 74AUP2G32 74AUP2G32DC PDF

    74AUP2G32

    Abstract: 74AUP2G32DC 74AUP2G32GM MO-187
    Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 02 — 28 February 2008 Product data sheet 1. General description The 74AUP2G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    74AUP2G32 74AUP2G32 74AUP2G32DC 74AUP2G32GM MO-187 PDF

    Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 5 — 6 December 2011 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    74AUP2G32 74AUP2G32 PDF

    74AUP2G32

    Abstract: 74AUP2G32DC 74AUP2G32GM JESD22-A114E
    Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 03 — 8 January 2009 Product data sheet 1. General description The 74AUP2G32 provides the dual 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    74AUP2G32 74AUP2G32 74AUP2G32DC 74AUP2G32GM JESD22-A114E PDF

    Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 7 — 23 January 2013 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    74AUP2G32 74AUP2G32 PDF

    Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 01 — 6 October 2006 Product data sheet 1. General description The 74AUP2G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    74AUP2G32 74AUP2G32 PDF

    NC7WP32L8X

    Abstract: SLG74LB2G32 74LVC2G32 74AUP2G32 NC7WP32 NC7WZ32 NL27WZ32 SN74AUC2G32 SN74AUP2G32 SN74LVC2G32
    Contextual Info: SLG74LB2G32 GreenLIBTM DUAL 2-INPUT OR GATE General Description The GreenLIB provides the dual 2-input OR function. This device ensures a very low static and dynamic power consumption. Output Summary • Features • Pb-Free / RoHS Compliant • Halogen-Free


    Original
    SLG74LB2G32 NC7WP32 NC7WZ32 74AUP2G32 74LVC2G32 NL27WZ32 SN74AUC2G32, SN74Ad 000-0074LB2G32-11 NC7WP32L8X SLG74LB2G32 SN74AUC2G32 SN74AUP2G32 SN74LVC2G32 PDF