74HCT00 Search Results

Contextual Info: 74LV00 Quad 2-input NAND gate Rev. 03 — 20 December 2007 Product data sheet 1. General description The 74LV00 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC00 and 74HCT00. The 74LV00 provides a quad 2-input NAND function.

Contextual Info: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 6 — 14 December 2011 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .

IC 74HC00

Contextual Info: 74HC00-Q100; 74HCT00-Q100 Quad 2-input NAND gate Rev. 1 — 12 July 2012 Product data sheet 1. General description The 74HC00-Q100; 74HCT00-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL

74LS00 pinout

Abstract: GD74HC00 pin configuration logic symbol 74LS00 logic symbol 74LS00 74HC00 5V 74HC00 74hc00 and gates TTL 74HC00 74HC GD54HC00
Contextual Info: GDS4/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS 00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet in­

74hc00+fan-out

Contextual Info: Technical Data CD54/74HC00 CD54/74HCT00 File Number 1464 High-Speed CMOS Logic I vcc Quad 2-Input NAND Gate u f e : - î — V - Ü - 4 V 5 Type Features: IQ- 3B • Buffered inputs m Typical propagation delay - 7 ns @ Vcc- 5V CL = 15 pF, Ts = 25° C - 3A

Contextual Info: GD54/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet in­

TTL 74HC00

Abstract: 74HC00 74HC00N 74HCT00 74HC00 B1 74HC00 quad CMOS nand gate CI 74HC00 74HCT00D 74HCT00N 74HC00D
Contextual Info: Philips Semiconductors Product specification Quad 2-input NAND gate 74HC00; 74HCT00 FEATURES DESCRIPTION • Complies with JEDEC standard no. 8-1A The 74HC00/74HCT00 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL LSTTL . They are specified in compliance with

74HCT00

Abstract: 74HC00 74HC00 ordering information 74HCT00D CI 74HC00 74HC00 quad CMOS nand gate TTL 74HC00 74HC00 NOT GATE 74HC00BQ
Contextual Info: 74HC00-Q100; 74HCT00-Q100 Quad 2-input NAND gate Rev. 1 — 12 July 2012 Product data sheet 1. General description The 74HC00-Q100; 74HCT00-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL

74HCT00A

Abstract: 751A-02 MC54HCTXXAJ MC74HCTXXAD MC74HCTXXAN
Contextual Info: ! 1991 Order this data sheet by MC54HCT00A/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input NAND Gate with LSTTL-Compatible Inputs High-Performance Silicon-Gate CMOS J SUFFIX CERAM IC CASE 632-08 The MC54/74HCT00A may be used as a level converter for interfacing TTL or

74hc00n

Abstract: 74hct00 CI 74hct00 74HC00DB 74HC00PW 74HC00 14 pin 74HC00 74HC00 B1 74HC00 ordering information 74HCT00DB
Contextual Info: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 6 — 14 December 2011 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HCT00A Quad 2-Input NAND Gate with LSTTL-Compatible Inputs High-Performance Silicon-Gate CMOS The MC54/74HCT00A may be used as a level converter for interfacing TTL or NMOS outputs to high-speed CMOS inputs. The HCTOOA is identical in pinout to the LSOO.

HCT00A

Abstract: DL129 LS00 MC54HCTXXAJ MC74HCTXXAD MC74HCTXXAN 74HCT00A
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input NAND Gate with LSTTL-Compatible Inputs MC54/74HCT00A High–Performance Silicon–Gate CMOS The MC54/74HCT00A may be used as a level converter for interfacing TTL or NMOS outputs to high–speed CMOS inputs.

LM 4017 decade counter driver

Abstract: 74HC7244A 74HCT7007A 74HC11A 74HC85A 74HC147 decimal to binary encoder cmos 4008 74HC21A 74HC07A 74HC7244
Contextual Info: 2.H IG H SPEED CMOS SELECTION GUIDE NÄ N D NOR A ND OR IN V E R T E R ,B U F FE R 74HC00A 74HCT00A 74HC03A 74HC10A 74HC20A 74HC30 71HC132A 74HC133A GATE 74HC02A 74HCT02A 74HC27A 74HC4002A 74HC4078 74HC08A 74HCT08A 74HC09A 74HC11A 74HC21A 74HC32A 74HCT32A 74HC4072

IC 74HC00

Abstract: 74hc00 fan-out 74hc00 and gates 74HC00 IC 74hct00 pin diagram
Contextual Info: Technical Data CD54/74H COO CD54/74HCT00 File N um ber 1464 High-Speed CMOS Logic Quad 2-Input NAND Gate Type Features: • B uffered inputs ■ Typical propagation delay = 7 ns < I Vcc = 5V CL = 15 pF, r A = 25° C 9 2 C 9 -3 C 8 M R I FUNCTIONAL DIAGRAM AND

74HC00

Abstract: 74HCT00 74LV00 74LV00BQ 74LV00D 74LV00DB 74LV00N 74LV00PW JESD22-A114E 74LV001
Contextual Info: 74LV00 Quad 2-input NAND gate Rev. 03 — 20 December 2007 Product data sheet 1. General description The 74LV00 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC00 and 74HCT00. The 74LV00 provides a quad 2-input NAND function.

74HC00

Abstract: 74hc00 datasheet 74HC00N 74HCT00 tPHL 74hc00 74hct00n 74HCT00D 74hc00 gate TTL 74HC00 74HC00DB
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74HC00; 74HCT00 Quad 2-input NAND gate Product specification Supersedes data of 1997 Aug 26 2003 Jun 30 Philips Semiconductors Product specification Quad 2-input NAND gate 74HC00; 74HCT00 FEATURES DESCRIPTION • Complies with JEDEC standard no. 8-1A

74HCT00A

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2 -In p u t NAND G ate w ith LSTTL-C om patible Inputs M C54/74HCT00A High-Performance Silicon-Gate CMOS The MC54/74HCT00A may be used as a level converter for interfacing TTL or NMOS outputs to high-speed CMOS inputs.

TTL 74HC00

Abstract: 74LS00 TTL TTL 74ls00 74LS00 gate diagram 74ls00 74LS00 function table pin configuration logic symbol 74LS00 logic symbol 74LS00 74HC00 5V 74HC00
Contextual Info: GD54/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet in­

74HC00

Abstract: 74HCT00 74HC00N 74hc00 tphl tplh 74HC00DB 74HC00PW 74HC00 B1 tPHL 74hc00 74HCT00DB 74HC00N function table
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74HC00; 74HCT00 Quad 2-input NAND gate Product specification Supersedes data of 1997 Aug 26 2003 Jun 25 Philips Semiconductors Product specification Quad 2-input NAND gate 74HC00; 74HCT00 FEATURES DESCRIPTION • Complies with JEDEC standard no. 8-1A

74hc00

Abstract: TTL 74HC00 74HCT00 74HCT00N 74HC00DB 74HCT00D 74HCT00DB 74HC00 B1 74HC00N function table 74HC00 ordering information
Contextual Info: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 04 — 11 January 2010 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .

74HCT00

Contextual Info: 74HCT00 QUADRUPLE 2-INPUT NAND GATES Description Pin Assignments The 74HCT00 provides provides four independent 2-input NAND gates with standard push-pull outputs. The device is designed for operation with a power supply range of 4.5V to 5.5V. The gates perform the Boolean function:

74HC00 NOT GATE

Abstract: 74HC00 74HCT00 TTL 74HC00 74HC00 national semiconductor 74HC00 B1 74HCT00N 74HC00DB 74HC00N 74HCT00D
Contextual Info: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 5 — 25 November 2010 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2 -In p u t NAND G ate w ith LSTTL-C om patible Inputs M C54/74HCT00A High-Performance Silicon-Gate CMOS J SUFFIX CERAM IC PACKAGE CASE 6 3 2 -0 8 The MC54/74HCT00A may be used as a level converter for interfacing

74HCT00

Abstract: HCTOO 74-Series a4-a2 pin diagram of Quad NAND
Contextual Info: M OTOROLA MC54/74HCT00 Product P re v ie w HIGH-PERFORMANCE CMOS LOW -POWER CO M PLEM ENTARY MOS S ILICO N-G ATE QUAD 2-INPUT NAND GATE WITH LSTTL-COMPATIBLE INPUTS Q UAD 2-INPUT NAND GATE (W ITH LSTTL-COMPATIBLE INPUTS) T he MC54/74HCTOO m ay be used as a level conve rter fo r interfacin g