74LCX112SJ Search Results
74LCX112SJ Datasheets (6)
Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
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74LCX112SJ |
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Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5 V Tolerant Inputs | Original | 99.83KB | 9 | ||
74LCX112SJ |
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Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Original | 78.62KB | 8 | ||
74LCX112SJ |
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Low Voltage Dual J-K Flip-Flops with Preset and Clear with 5V Tolerant Inputs | Scan | 100.39KB | 3 | ||
74LCX112SJX |
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Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs; Package: SOP; No of Pins: 16; Container: Tape & Reel | Original | 99.82KB | 9 | ||
74LCX112SJX |
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Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs | Original | 78.63KB | 8 | ||
74LCX112SJX |
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Low Voltage Dual J-K Flip-Flops with Preset and Clear with 5V Tolerant Inputs | Scan | 100.39KB | 3 |
74LCX112SJ Price and Stock
Rochester Electronics LLC 74LCX112SJIC FF JK TYPE DOUBLE 1BIT 16SOP |
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74LCX112SJ | Tube | 17,504 | 1,040 |
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onsemi 74LCX112SJIC FF JK TYPE DOUBLE 1BIT 16SOP |
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74LCX112SJ | Tube |
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onsemi 74LCX112SJXIC FF JK TYPE DOUBLE 1BIT 16SOP |
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74LCX112SJX | Reel |
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FAIRCHILD 74LCX112SJ74LCX112SJ |
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74LCX112SJ | 9,766 | 1,304 |
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Fairchild Semiconductor Corporation 74LCX112SJJ-K Flip-Flop, LVC/LCX/Z Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16 |
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74LCX112SJ | 17,504 | 1 |
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74LCX112SJ Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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5555 FAIRCHILD optocoupler
Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
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SCYB017A A010203 5555 FAIRCHILD optocoupler MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N | |
Contextual Info: S E M I C O N D U C T O R Revised A ugust 1998 TM 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX112 is a dual J-K flip-flop. Each flip-flop has indejDendent J, K, PRESET, CLEAR, and C LO C K inputs with Q, |
OCR Scan |
74LCX112 LCX112 | |
74LCX112
Abstract: 74LCX112M 74LCX112MX 74LCX112SJ M16A
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74LCX112 74LCX112 ds012424 74LCX112M 74LCX112MX 74LCX112SJ M16A | |
Contextual Info: Revised August 1998 SE M IC O N D U C TO R TM 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX112 is a dual J-K flip-flop. Each flip-flop has inde£endent J, K, PRESET, CLEAR, and CLOCK inputs with Q, |
OCR Scan |
74LCX112 LCX112 74LCX112 | |
diode M160
Abstract: 74LCX112 74LCX112M 74LCX112MTC 74LCX112MTCX 74LCX112MX 74LCX112SJ 74LCX112SJX M16A
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OCR Scan |
74LCX112 74LCX112 diode M160 74LCX112M 74LCX112MTC 74LCX112MTCX 74LCX112MX 74LCX112SJ 74LCX112SJX M16A | |
Contextual Info: Revised June 1998 S E M I C O N D U C T O R TM 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX112 is a dual J-K flip-flop. Each flip-flop has indepen dent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q out |
OCR Scan |
74LCX112 LCX112 74LCX112 | |
Contextual Info: Revised February 2001 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX112 is a dual J-K flip-flop. Each flip-flop has independent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q outputs. These devices are edge sensitive and change |
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74LCX112 LCX112 74LCX112 | |
CD4558
Abstract: NC7S125 MC74F138N HCF4541 Motorola MC74HC251N 74ACT161 DHVQFN-20 74V1G08 SOT323/5 HCF4017 SN74ACT14DR
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74ABT16244 A010203 53001cov SCYB017 CD4558 NC7S125 MC74F138N HCF4541 Motorola MC74HC251N 74ACT161 DHVQFN-20 74V1G08 SOT323/5 HCF4017 SN74ACT14DR | |
LCX112
Abstract: MTC16 74LCX112 74LCX112M 74LCX112MTC 74LCX112SJ M16A M16D
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74LCX112 LCX112 74LCX112 MTC16 74LCX112M 74LCX112MTC 74LCX112SJ M16A M16D | |
LCX112Contextual Info: LCX112 tß National ADVANCE INFORMATION Semiconductor 74LCX112 Low Voltage Dual J-K Flip-Flops with Preset and Clear with 5V Tolerant Inputs General Description Features The 74LCX112 are dual J-K flip-flops. Each flip-flop has In dependent J, K, PRESET, CLEAR, and CLOCK inputs Q, <3 |
OCR Scan |
LCX112 74LCX112 74LCX112M 74LCX112MX 74LCX112SJ 74LCX112SJX 74LCX112MTC 74LCX112MTCX LCX112 | |
74ls74apc
Abstract: HD74ls04p 74LVC1G04ady8 semiconductor AZ431BZ-AE1 HCF4060BE HEF4093BP datasheet free download ne5334 hd74hc132p dm74ls47n
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74LCX112
Abstract: 74LCX112M 74LCX112MTC 74LCX112SJ LCX112 M16A M16D MTC16
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74LCX112 LCX112 74LCX112 74LCX112M 74LCX112MTC 74LCX112SJ M16A M16D MTC16 | |
MC0628R
Abstract: 40373 74hc14n equivalent 4046 application note philips HCF4060BE HCF4017BE SN74121 application note MC74HC373DW mc0628 HCF4053BE
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SCYB017A T74ALVC32374 74CBTLV16211 SN74CBTD16211 SN74SSTV16859 SN74CBTLV16211GRDR SN74ALVC16245AGRDR -SN74SSTV16859GKER MC0628R 40373 74hc14n equivalent 4046 application note philips HCF4060BE HCF4017BE SN74121 application note MC74HC373DW mc0628 HCF4053BE | |
74LCX112
Abstract: 74LCX112M 74LCX112MTC 74LCX112SJ LCX112 M16A M16D MTC16
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OCR Scan |
74LCX112 LCX112 74LCX112 74LCX112M 74LCX112MTC 74LCX112SJ M16A M16D MTC16 | |
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LCX112
Abstract: 74LCX112 74LCX112M 74LCX112MTC 74LCX112SJ M16A M16D MTC16 DSA0031497
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74LCX112 LCX112 74LCX112 74LCX112M 74LCX112MTC 74LCX112SJ M16A M16D MTC16 DSA0031497 | |
X112MContextual Info: Revised March 1999 S E M I C O N D U C T O R TM 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX112 is a dual J-K flip-flop. Each flip-flop has indejDendent J, K, PRESET, CLEAR, and C LO C K inputs with Q, |
OCR Scan |
74LCX112 LCX112 X112M | |
5555 FAIRCHILD optocoupler
Abstract: DM74LS75N MC74HC373DW 74hc14n equivalent HCF4060BE 40373 NC7S125M5X datasheet 14543 motorola 14049 CD40106BE
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Original |
SCYB017A A010203 5555 FAIRCHILD optocoupler DM74LS75N MC74HC373DW 74hc14n equivalent HCF4060BE 40373 NC7S125M5X datasheet 14543 motorola 14049 CD40106BE |