74LS377 Search Results

Contextual Info: 74LS377 S ignetics Flip-Flop Octal D Flip-Flop With Clock Enable Product Specification Logic Products FEATURES • Ideal for addressable register applications • Clock Enable for address and data synchronization applications • Eight edge-triggered D flip-flops

ls378

Abstract: 74LS377 74LS174 74LS175 74LS378 74LS379
Contextual Info: SN54/74LS377 SN54/74LS378 SN54/74LS379 OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN54 / 74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a

Contextual Info: GD54/74LS377 OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP FLOP WITH ENABLE Features Pin Configuration • • Eight-bit, high speed parallel registers Positive, edge-triggered, D-type flip-flops • Buffered common clock and buffered common clock enable Vcc 8Q

74LS377PC

Abstract: ls 377 54LS377DM 54LS377FM 74LS377DC 74LS377FC CP1020
Contextual Info: 377 C O N N E C T IO N D IA G R A M P IN O U T A 54LS/74LS377 O C TA L D FLIP-FLO P W ith C om m on Enable and Clock D E S C R IP T IO N — T he '377 is an 8 -b it re g iste r b u ilt using advanced lo w p o w e r S c h o ttk y te c h n o lo g y . T h is reg iste r co n sists o f e ig h t D -typ e flip -flo p s w ith a

74LS377

Abstract: 74ls175 pin diagram 74LS174 74LS175 74LS378 74LS379 motorola ceramic dual in-line case 74ls377 motorola
Contextual Info: SN54/74LS377 SN54/74LS378 SN54/74LS379 OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN54 / 74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a

74198

Abstract: 74LS194 74198 pin diagram 54LS D172 D173 74LS273 74LS323 74ls273 fairchild 74LS398
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL 088 54LS/74LS299 11 18 Vcc Pin 20 QND = Pin 10 D89 54LS/74LS323 Vcc = Pin 20 QND = Pin 10 D90 54LS/74LS273 3 4 7 8 13 14 17 18 Vcc = Pin 20 GND = Pin 10 D91 54LS/74LS377 1 3 4 7 8 13 14 17 18 Vcc = Pin 20 GND = Pin 10

Contextual Info: 74LS377 Signetics Flip-Flop Octal D Flip-Flop With Clock Enable Product Specification Logic Products FEATURES • Ideal for addressable register applications • Clock Enable for address and data synchronization applications • Eight edge-triggered D flip-flops

Am25LS377pc

Abstract: AM25LS377
Contextual Info: Am25LS377 • Am25LS377B Am54LS/74LS377 8-Bit Register with Register Enable 8-Bit Register with Register Enable and Buffered Outputs DISTINCTIVE CHARACTERISTICS FUNCTIONAL DESCRIPTION • Eight-bit, high speed parallel registers • Clock to output delay - 14ns typ on Am25LS377

pin diagram of 74LS

Abstract: 74LS 04 N 1N3064 1N916 74LS 74LS377 N74LS377D N74LS377N LSM9
Contextual Info: 74LS377 Signetics Flip-Flop Octal D Flip-Flop With Clock Enable Product Specification Logic Products FEATURES • Ideal for addressable register applications • Clock Enable for address and data synchronization applications • Eight edge-triggered D flip-flops

Motorola 74LS

Contextual Info: < 8 SN54LS/74LS377 SN54LS/74LS378 SN54LS/74LS379 M OTOROLA D E S C R IP T IO N — The S N 54 L S /7 4 L S 37 7 is an 8 -bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip -flo p s w ith a buffered common clock and a buffered

Contextual Info: M OTOROLA SN54LS/74LS377 SN54LS/74LS378 SN54LS/74LS379 D E S C R IP T IO N — The S N 54LS /74LS 377 is an 8 -bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip -flo p s w ith a buffered com m on clock and a buffered

1N3064

Abstract: 1N916 74LS 74LS377 N74LS377D N74LS377N
Contextual Info: 74LS377 Signefics Flip-Flop Octal D Flip-Flop With Clock Enable Product Specification Logic Products FEATURES • Ideal for addressable register applications • Clock Enable for address and data synchronization applications • Eight edge-triggered D flip-flops

74ls379

Contextual Info: < 3 > MOTOROLA OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN54/74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable.

74LS377P

Contextual Info: MITSUBISHI LSTTLs M 74LS377P OCTAL P O S IT IV E EDG E-TRIG GERED D -T Y P E F L IP FLOP W IT H ENABLE DESCRIPTION The M 7 4L S 37 7P PIN CONFIGURATION TOP VIEW is a semiconductor integrated circuit containing 8 D -type positive edge-triggered flip -flo p circuits

Contextual Info: 377 CO NNECTIO N DIAGRAM PINOUT A 54LS/74LS377 b / / S V 3 OCTAL D FLIP-FLOP With Common Enable and Clock DESCRIPTION — The '377 is an 8-bit register built using advanced low power S chottky technology. This register consists of eight D-type flip -flop s with a

Contextual Info: V TC74HC377AP/AF OCTAL D - T Y P E F L I P - F L O P T h e T C 74H C377A is a h ig h sp e e d CM O S O C T A L D - T Y P E F L I P - F L O P fa b ric a te d w ith silic o n g a te C2M OS te c h n o lo g y . It a c h ie v e s th e h ig h sp e e d o p e ra tio n s i m i l a r to

MC2100 REV B

Abstract: MC2100 REV c 74109 MC2100 e rev b MC2100 Rev A MC212 MC2100 MC2300 MC2400 MC2500
Contextual Info: Navigator Motion Processor MC2100 Series Technical Specifications for Brushed Servo Motion Control Performance Motion Devices, Inc. 55 Old Bedford Road Lincoln, MA 01773 Revision 1.6, April 2002 NOTICE This document contains proprietary and confidential information of Performance Motion Devices,

M74LS377P

Abstract: 20-PIN
Contextual Info: MITSUBISHI LSTTLs M 7 4 L S 3 7 7 P OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP FLOP W ITH ENABLE DESCRIPTION The M 7 4L S 37 7P PIN CONFIGURATION TOP VIEW is a semiconductor integrated circuit containing 8 D -type positive edge-triggered flip -flo p circuits

circuit card assy input filter for miller 200 Dx

Abstract: 64 point radix 2 FFT LM318 list DSP101 74AS20 TTL radix-4 DIT FFT C code TLC32040C TMS320 TMS320C31 TMS320C32
Contextual Info: TMS320C3x GeneralĆPurpose Applications User’s Guide 1998 Digital Signal Processing Solutions Printed in U.S.A., January 1998 SDS SPRU194 TMS320C3x General-Purpose Applications User’s Guide Literature Number: SPRU194 January 1998 Printed on Recycled Paper

M74HC377B1R

Abstract: M74HC377 74HC377 Logic Package Information 74hc377 M54HC377 M54HC377F1R M74HC377C1R M74HC377M1R M74HC377B1
Contextual Info: M54HC377 M74HC377 OCTAL D TYPE FLIP FLOP . . . . . . . . HIGH SPEED fMAX = 73 MHz TYP. at VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) at 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

Contextual Info: TOSHIBA 14E O I *10T?2Ma 0010335 b | LOGIC/MEMORY TC74HC377P/F TC74HC377P/F OCTAL D-TYPE FLIP-FLOP The TC74HC377 Is high speed CMOS D-TYPE FLIP-FLOP fabricated with silicon C2MOS technology. It achieve the high speed operation similar to equivalent LSTTL while maintaining

C350AVB

Abstract: full adder using Multiplexer IC 74150 74LS382 74ls69 T2D 7N IC 74ls147 pin details 74LS396 MB652xxx 651XX 74LS86 full adder
Contextual Info: FUJITSU MICROELECTRONICS F U JIT S U wmmm 7flC D B 37MT7bH □D03c]4b 3 • JZ CMOS Gate Array GENERAL INFORMATION The Fujitsu CM O S gate array fam ily consists of tw en tyeight device types which are fabricated w ith advanced silicon gate CMOS technology. And more than 14 devices

TDC1012 TRW

Abstract: TDC1012 1012N7 TDC4611 74ls377 C1012 CRYSTAL trw 1012j7 1012N7C-X TDC1012C3VX
Contextual Info: YR m TDC1012 Monolithic Digital-To-Analog Converter 12-Bit, 20Msps The TDC1012 is a TTL compatible, 12-bit monolithic D/A converter capable of converting digital data into an analog current or voltage at data rates in excess of 20 Megasamples-per second Msps .

20GND

Abstract: 74198 74LS194
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