74LV10N Search Results

74LV10N Datasheets (6)

Part	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
74LV10N	Philips Semiconductors	Triple 3-Input NAND Gate	Original	PDF	111.52KB	10
74LV10N	Unknown	Historical semiconductor price guide (US$ - 1998). From our catalog scanning project.	Historical	PDF	30.5KB	1
74LV10N	Philips Semiconductors	Triple 3-input NAND gate	Scan	PDF	205.47KB	9
74LV10N	Philips Semiconductors	Triple 3-input NAND gate	Scan	PDF	86.92KB	3
74LV10N	Philips Semiconductors	Triple 3-input NAND gate	Scan	PDF	215.59KB	9
74LV10N	Philips Semiconductors	Triple 3-input NAND gate	Scan	PDF	89.02KB	3

74LV10N Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
74LV10 Abstract: 74LV10D 74LV10DB 74LV10PW Contextual Info: Product Specification Philips Semiconductors 74LV10 Triple 3-input NAND gate QUICK REFERENCE DATA FEATURES GND = 0 V; Tamb = 25°C; tr = t, < 2.5 ns • • • • • • Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and	OCR Scan	74LV10 74LV10 74HC/HCT10. 7110flSb 74LV10D 74LV10DB 74LV10PW	PDF
Contextual Info: Phifips Semiconductors Product specification Triple 3-input NAND gate 74LV10 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 to 3.6 V The 74L.V10 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT10.	OCR Scan	74LV10 74HC/HCT10. 74LV10	PDF
DIL 14 M Abstract: 74LV10 74LV10D 74LV10DB 74LV10N 74LV10PW Contextual Info: Philips Semiconductors Product Specification Triple 3-input NAND gate FEATURES • • • • • • 74LV10 QUICK REFERENCE DATA GND = 0 V; T „ * = 25°C; t, = t, S 2.5 ns Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and	OCR Scan	74LV10 74LV10 74HC/HCT10. 711Dfl2fc. DIL 14 M 74LV10D 74LV10DB 74LV10N 74LV10PW	PDF

Catalog Datasheet

Type

Document Tags

PDF

74LV10

Abstract: 74LV10D 74LV10DB 74LV10PW
Contextual Info: Product Specification Philips Semiconductors 74LV10 Triple 3-input NAND gate QUICK REFERENCE DATA FEATURES GND = 0 V; Tamb = 25°C; tr = t, < 2.5 ns • • • • • • Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and

OCR Scan

74LV10 74LV10 74HC/HCT10. 7110flSb 74LV10D 74LV10DB 74LV10PW

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Contextual Info: Phifips Semiconductors Product specification Triple 3-input NAND gate 74LV10 FEATURES DESCRIPTION • Optimized for Low Voltage applications: 1.0 to 3.6 V The 74L.V10 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT10.

OCR Scan

74LV10 74HC/HCT10. 74LV10

PDF

DIL 14 M

Abstract: 74LV10 74LV10D 74LV10DB 74LV10N 74LV10PW
Contextual Info: Philips Semiconductors Product Specification Triple 3-input NAND gate FEATURES • • • • • • 74LV10 QUICK REFERENCE DATA GND = 0 V; T „ * = 25°C; t, = t, S 2.5 ns Optimized for Low Voltage applications: 1.0 to 3.6 V Accepts TTL input levels between Vcc = 2.7 V and

OCR Scan

74LV10 74LV10 74HC/HCT10. 711Dfl2fc. DIL 14 M 74LV10D 74LV10DB 74LV10N 74LV10PW

PDF