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    74LVC Search Results

    74LVC Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LVCH16374APVG8 Renesas Electronics Corporation 3.3V CMOS 16-Bit Edge-Triggered D-Type Flip-Flop with 3-State Outputs, 5.0V Tolerant I/O, and Bus-Hold Visit Renesas Electronics Corporation
    74LVC16245APAG8 Renesas Electronics Corporation 3.3V CMOS 16-Bit Bus Transceiver with 3-State Outputs and 5.0V Tolerant I/O Visit Renesas Electronics Corporation
    74LVC16244APAG Renesas Electronics Corporation 3.3V CMOS 16-Bit Buffer/Driver with 3-State Outputs, 5.0V Tolerant I/O Visit Renesas Electronics Corporation
    74LVCH162244APAG8 Renesas Electronics Corporation 3.3V CMOS 16-Bit Buffer/Driver with 3-State Outputs, 5.0V Tolerant I/O, and Bus-Hold Visit Renesas Electronics Corporation
    74LVC162244APAG Renesas Electronics Corporation 3.3V CMOS 16-Bit Buffer/Driver with 3-State Outputs, 5.0V Tolerant I/O, and Bus-Hold Visit Renesas Electronics Corporation
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    74LVC Price and Stock

    Nexperia 74LVC2G08GF,115

    IC GATE AND 2CH 2-INP 8XSON
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    DigiKey 74LVC2G08GF,115 Digi-Reel 9,443 1
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    Nexperia 74LVC16245ADGG,118

    IC TXRX NON-INVERT 3.6V 48TSSOP
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    DigiKey 74LVC16245ADGG,118 Digi-Reel 6,274 1
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    74LVC16245ADGG,118 Cut Tape 6,274 1
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    74LVC16245ADGG,118 Reel 6,000 2,000
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    Bristol Electronics 74LVC16245ADGG,118 604
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    Rochester Electronics 74LVC16245ADGG,118 1,368 1
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    Avnet Asia 74LVC16245ADGG,118 10,000 8 Weeks 4,000
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    Avnet Silica 74LVC16245ADGG,118 10,000 10 Weeks 2,000
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    Nexperia 74LVC1G157GM,132

    IC MULTIPLX 1 X 2:1 6XSON/SOT886
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    DigiKey 74LVC1G157GM,132 Cut Tape 4,716 1
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    Diodes Incorporated 74LVC1G02QSE-7

    IC GATE NOR 1CH 2-INP SOT353
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    DigiKey 74LVC1G02QSE-7 Digi-Reel 2,858 1
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    74LVC1G02QSE-7 Cut Tape 2,858 1
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    Newark 74LVC1G02QSE-7 Cut Tape 5,765 5
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    Avnet Silica 74LVC1G02QSE-7 3,000 10 Weeks 3,000
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    Nexperia 74LVC244ABZX

    IC BUFF NON-INVERT 3.6V 20DHXQFN
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    DigiKey 74LVC244ABZX Cut Tape 2,498 1
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    Mouser Electronics 74LVC244ABZX 2,734
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    Newark 74LVC244ABZX Cut Tape 1,590 1
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    Find more 74LVC price and stock on Findchips.com

    74LVC Datasheets (500)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVC00A Diodes Incorporated QUADRUPLE 2-INPUT NAND GATES Original PDF
    74LVC00A Philips Semiconductors Quad 2-input NAND gate Original PDF
    74LVC00A STMicroelectronics LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE Original PDF
    74LVC00A STMicroelectronics Quad 2-Input NAND Gate Advenced Performance Original PDF
    74LVC00ABQ NXP Semiconductors Quad 2-input NAND gate Original PDF
    74LVC00ABQ Philips Semiconductors 74LVC00A, Quad 2-input NAND gate Original PDF
    74LVC00ABQ Philips Semiconductors Quad 2-Input NAND Gate Original PDF
    74LVC00ABQ,115 NXP Semiconductors Quad 2-input NAND gate - Description: 3.3V Quad 2-Input NAND Gate ; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.1@3.3V ns; Voltage: 1.2-3.6; Package: SOT762-1 (DHVQFN14); Container: Reel Pack, SMD, 7" Original PDF
    74LVC00ABQ,115 NXP Semiconductors 74LVC00 - IC LVC/LCX/Z SERIES, QUAD 2-INPUT NAND GATE, PQCC14, 2.50 X 3 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT-762-1, DHVQFN-14, Gate Original PDF
    74LVC00ABQ-G NXP Semiconductors Quad 2-input NAND gate - Description: 3.3V Quad 2-Input NAND Gate ; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.1@3.3V ns; Voltage: 1.2-3.6 Original PDF
    74LVC00ABQ-G NXP Semiconductors 74LVC00ABQ - Quad 2-input NAND gate - Description: 3.3V Quad 2-Input NAND Gate ; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.1@3.3V ns; Voltage: 1.2-3.6 Original PDF
    74LVC00ABQ-Q100 NXP Semiconductors Quad 2-input NAND gate Original PDF
    74LVC00ABQ-Q100115 NXP Semiconductors NAND GATE Original PDF
    74LVC00ABQ-Q100X NXP Semiconductors 74LVC00ABQ-Q100 - 74LVC00ABQ-Q100 - Quad 2-input NAND gate Original PDF
    74LVC00AD NXP Semiconductors Quad 2-input NAND gate Original PDF
    74LVC00AD Philips Semiconductors Quad 2-input NAND gate Original PDF
    74LVC00AD Philips Semiconductors Quad 2-Input NAND Gate Original PDF
    74LVC00AD,112 NXP Semiconductors Quad 2-input NAND gate - Description: 3.3V Quad 2-Input NAND Gate ; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.1@3.3V ns; Voltage: 1.2-3.6; Package: SOT108-1 (SO14); Container: Tube Original PDF
    74LVC00AD,112 NXP Semiconductors 74LVC00 - IC LVC/LCX/Z SERIES, QUAD 2-INPUT NAND GATE, PDSO14, 3.90 MM, PLASTIC, MS-012, SOT-108-1, SO-14, Gate Original PDF
    74LVC00AD,118 NXP Semiconductors Quad 2-input NAND gate - Description: 3.3V Quad 2-Input NAND Gate ; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.1@3.3V ns; Voltage: 1.2-3.6; Package: SOT108-1 (SO14); Container: Reel Pack, SMD, 13" Original PDF
    ...

    74LVC Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 74LVC1G14 Single Schmitt-trigger inverter Rev. 12 — 6 August 2012 Product data sheet 1. General description The 74LVC1G14 provides the inverting buffer function with Schmitt-trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free


    Original     		PDF 74LVC1G14 74LVC1G14

    nz104

    Abstract: No abstract text available
    Text: 74LVC2G66 Bilateral switch Rev. 7 — 22 June 2012 Product data sheet 1. General description The 74LVC2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVC2G66 provides two single pole, single-throw analog switch functions. Each switch has two input/output terminals nY and nZ and an active HIGH enable input (nE).


    Original     		PDF 74LVC2G66 74LVC2G66 nz104

    application note tssop5 nxp

    Abstract: No abstract text available
    Text: 74LVC1G06 Inverter with open-drain output Rev. 10 — 29 June 2012 Product data sheet 1. General description The 74LVC1G06 provides the inverting buffer. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC1G06 74LVC1G06 application note tssop5 nxp

    Untitled

    Abstract: No abstract text available
    Text: 74LVC1G08 Single 2-input AND gate Rev. 9 — 9 December 2011 Product Specification 1. General description The 74LVC1G08 provides one 2-input AND function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.


    Original     		PDF 74LVC1G08 74LVC1G08 771-LVC1G08GWDG125 74LVC1G08GW/DG

    MARKING V7 6-PIN

    Abstract: No abstract text available
    Text: 74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 11 — 6 July 2012 Product data sheet 1. General description The 74LVC3G14 provides three inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.


    Original     		PDF 74LVC3G14 74LVC3G14 MARKING V7 6-PIN

    marking VU SOT363

    Abstract: No abstract text available
    Text: 74LVC1G11 Single 3-input AND gate Rev. 7 — 4 July 2012 Product data sheet 1. General description The 74LVC1G11 provides a single 3-input AND gate. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC1G11 74LVC1G11 marking VU SOT363

    Untitled

    Abstract: No abstract text available
    Text: 74LVC1GU04 Inverter Rev. 11 — 2 July 2012 Product data sheet 1. General description The 74LVC1GU04 provides the inverting single state unbuffered function. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC1GU04 74LVC1GU04 JESD22-A114F JESD22-A115-A

    Marking code V7

    Abstract: No abstract text available
    Text: 74LVC2G00 Dual 2-input NAND gate Rev. 11 — 22 June 2012 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC2G00 74LVC2G00 Marking code V7

    74LVC646A

    Abstract: 74LVC646AD 74LVC646ADB 74LVC646APW SO24 SSOP24 TSSOP24
    Text: 74LVC646A Octal bus transceiver/register; 3-state Rev. 04 — 29 June 2004 Product data sheet 1. General description The 74LVC646A is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74LVC646A 74LVC646A 74LVC646AD 74LVC646ADB 74LVC646APW SO24 SSOP24 TSSOP24

    74LVCH32245A

    Abstract: 74LVCH32245AEC LVCH32245A
    Text: 74LVCH32245A 32-bit bus transceiver with direction pin; 5 V tolerant; 3-state Rev. 03 — 20 August 2007 Product data sheet 1. General description The 74LVCH32245A is a 32-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device features four output enable nOE


    Original     		PDF 74LVCH32245A 32-bit 74LVCH32245A 74LVCH32245AEC LVCH32245A

    74LVC595A

    Abstract: 74LVC595ABQ 74LVC595AD 74LVC595APW DHVQFN16 TSSOP16
    Text: 74LVC595A 8-bit serial-in/serial-out or parallel-out shift register; 3-state Rev. 01 — 29 May 2007 Product data sheet 1. General description The 74LVC595A is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks.


    Original     		PDF 74LVC595A 74LVC595A 74LVC595ABQ 74LVC595AD 74LVC595APW DHVQFN16 TSSOP16

    74LVC1G53

    Abstract: 74LVC1G53DC 74LVC1G53DP 74LVC1G53GD 74LVC1G53GT JESD22-A114E MO-187 V53 TSSOP8
    Text: 74LVC1G53 2-channel analog multiplexer/demultiplexer Rev. 05 — 11 June 2008 Product data sheet 1. General description The 74LVC1G53 is a low-power, low-voltage, high-speed, Si-gate CMOS device. The 74LVC1G53 provides one analog multiplexer/demultiplexer with a digital select


    Original     		PDF 74LVC1G53 74LVC1G53 74LVC1G53DC 74LVC1G53DP 74LVC1G53GD 74LVC1G53GT JESD22-A114E MO-187 V53 TSSOP8

    74LVC3G14

    Abstract: 74LVC3G14DC 74LVC3G14DP 74LVC3G14GM 74LVC3G14GT JESD22-A114E MO-187
    Text: 74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 07 — 12 June 2008 Product data sheet 1. General description The 74LVC3G14 provides three inverting buffers with Schmitt trigger action. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of


    Original     		PDF 74LVC3G14 74LVC3G14 74LVC3G14DC 74LVC3G14DP 74LVC3G14GM 74LVC3G14GT JESD22-A114E MO-187

    74LVC1G3157GV

    Abstract: 74LVC1G3157GW 74LVC1G3157 74LVC1G3157GF 74LVC1G3157GM JESD22-A114E
    Text: 74LVC1G3157 2-channel analog multiplexer/demultiplexer Rev. 02 — 18 September 2007 Product data sheet 1. General description The 74LVC1G3157 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVC1G3157 provides one analog multiplexer/demultiplexer with one digital select


    Original     		PDF 74LVC1G3157 74LVC1G3157 74LVC1G3157GV 74LVC1G3157GW 74LVC1G3157GF 74LVC1G3157GM JESD22-A114E

    74LVC1G06

    Abstract: 74LVC1G06GF 74LVC1G06GM 74LVC1G06GV 74LVC1G06GW JESD22-A114E
    Text: 74LVC1G06 Inverter with open-drain output Rev. 07 — 12 July 2007 Product data sheet 1. General description The 74LVC1G06 provides the inverting buffer. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment.


    Original     		PDF 74LVC1G06 74LVC1G06 74LVC1G06GF 74LVC1G06GM 74LVC1G06GV 74LVC1G06GW JESD22-A114E

    74LVC162244A

    Abstract: 74LVC162244ADGG 74LVC162244ADL 74LVCH162244A 74LVCH162244ADGG 74LVCH162244ADL SSOP48
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC162244A; 74LVCH162244A 16-bit buffer/line driver, 30 Ω series termination resistors; 5 V tolerant input/output; 3-state Product specification Supersedes data of 1998 Feb 17 2003 Dec 12 Philips Semiconductors Product specification


    Original     		PDF 74LVC162244A; 74LVCH162244A 16-bit 74LVC 62244A SCA75 R20/04/pp16 74LVC162244A 74LVC162244ADGG 74LVC162244ADL 74LVCH162244A 74LVCH162244ADGG 74LVCH162244ADL SSOP48

    74LVC2G66

    Abstract: 74LVC2G66DC 74LVC2G66DP 74LVC2G66GT 74LVCV2G66 JESD22-A114E JESD78
    Text: 74LVC2G66 Bilateral switch Rev. 04 — 1 July 2008 Product data sheet 1. General description The 74LVC2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVC2G66 provides two single pole, single-throw analog switch functions. Each switch has two input/output terminals nY and nZ and an active HIGH enable input (nE).


    Original     		PDF 74LVC2G66 74LVC2G66 74LVC2G66DC 74LVC2G66DP 74LVC2G66GT 74LVCV2G66 JESD22-A114E JESD78

    74LVC2G126

    Abstract: 74LVC2G126DC 74LVC2G126DP 74LVC2G126GD 74LVC2G126GM 74LVC2G126GT JESD22-A114E MO-187
    Text: 74LVC2G126 Dual bus buffer/line driver; 3-state Rev. 08 — 5 May 2008 Product data sheet 1. General description The 74LVC2G126 is a dual non-inverting buffer/line driver with 3-state outputs. Each 3-state output is controlled by an output enable input pin nOE . A LOW-level at pin nOE


    Original     		PDF 74LVC2G126 74LVC2G126 74LVC2G126DC 74LVC2G126DP 74LVC2G126GD 74LVC2G126GM 74LVC2G126GT JESD22-A114E MO-187

    74LVC4245A

    Abstract: 74LVC4245ABQ 74LVC4245AD 74LVC4245ADB 74LVC4245APW JESD22-A114E SO24 SSOP24
    Text: 74LVC4245A Octal dual supply translating transceiver; 3-state Rev. 06 — 18 January 2008 Product data sheet 1. General description The 74LVC4245A is an octal dual supply translating transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. It is designed to


    Original     		PDF 74LVC4245A 74LVC4245A 74LVC4245ABQ 74LVC4245AD 74LVC4245ADB 74LVC4245APW JESD22-A114E SO24 SSOP24

    74LVC2G241

    Abstract: 74LVC2G241DC 74LVC2G241DP 74LVC2G241GD 74LVC2G241GM 74LVC2G241GT JESD22-A114E
    Text: 74LVC2G241 Dual buffer/line driver; 3-state Rev. 09 — 10 June 2008 Product data sheet 1. General description The 74LVC2G241 is a dual non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE:


    Original     		PDF 74LVC2G241 74LVC2G241 74LVC2G241DC 74LVC2G241DP 74LVC2G241GD 74LVC2G241GM 74LVC2G241GT JESD22-A114E

    74LVC16241A

    Abstract: 74LVC16241ADGG 74LVC16241ADL SSOP48 TSSOP48
    Text: 74LVC16241A 16-bit buffer/line driver with 5 V tolerant inputs/outputs; 3-state Rev. 03 — 16 February 2004 Product data sheet 1. General description The 74LVC16241A is a high-performance, low-power and low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74LVC16241A 16-bit 74LVC16241A 74LVC16241ADGG 74LVC16241ADL SSOP48 TSSOP48

    74LVC16373A

    Abstract: 74LVC16373ADGG 74LVC16373ADL 74LVCH16373A 74LVCH16373ADGG 74LVCH16373ADL TSSOP48
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC16373A; 74LVCH16373A 16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Product specification Supersedes data of 2002 Oct 02 2003 Dec 08 Philips Semiconductors Product specification 16-bit D-type transparent latch with 5 V


    Original     		PDF 74LVC16373A; 74LVCH16373A 16-bit 74LVC 6373A SCA75 74LVC16373A 74LVC16373ADGG 74LVC16373ADL 74LVCH16373A 74LVCH16373ADGG 74LVCH16373ADL TSSOP48

    74LVC1G58

    Abstract: 74LVC1G58GF 74LVC1G58GM 74LVC1G58GV 74LVC1G58GW JESD22-A114E marking code 5
    Text: 74LVC1G58 Low-power configurable multiple function gate Rev. 04 — 27 April 2009 Product data sheet 1. General description The 74LVC1G58 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,


    Original     		PDF 74LVC1G58 74LVC1G58 74LVC1G58GF 74LVC1G58GM 74LVC1G58GV 74LVC1G58GW JESD22-A114E marking code 5

    SOT536-1

    Abstract: 74LVC32245A 74LVC32245AEC
    Text: 74LVC32245A 32-bit bus transceiver with direction pin; 5 V tolerant; 3-state Rev. 01 — 20 August 2007 Product data sheet 1. General description The 74LVC32245A is a 32-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device features four output enable nOE


    Original     		PDF 74LVC32245A 32-bit 74LVC32245A SOT536-1 74LVC32245AEC