7BFL Search Results

Q002

Abstract: OP999 OP299 Q002b71
Contextual Info: b7 TäSfl O Product Bulletin OP999 June 1996 Q002b71 OPTEK 7bfl PIN Silicon Photodiode Type OP999 Features • Narrow receiving angle • Linear response vs. irradiance • Fast switching time • T-1 3/4 package style Reverse Breakdown V o lta g e . 60 V

SKT1000

Abstract: SKT 2700 din 41814 QDG3511 SKT1200 btm 180 SKT 1900 skt1000/24
Contextual Info: S1E D • &l3bh?l 00G3SDÔ 7bfl W MSZKG SEMIKRON INC 5EMIKRDN V rsm It r m s V rrm V drm fV -dt1 J cr maximum values for continuous operation 2300 A | 2800 A (sin. 180; Tcase = . . . ; DSC) 1780 A (55 °C) 1465 A (58 °C) It a v V V V/|1S 500 900 1300 400

7ROM

Abstract: MN6401 J071 parcor 22-DIP SH 6770 MN6402 MN6403 akai ti 6770
Contextual Info: PANASONIC INDL/ELEK -CIO 72 □‘□ H A S S □ □□fc.7bfl 7 | 6932852 PANASONIC INDL«ELECTRONIC1ZÇ 06768 OX'7?.'/? fill ^ 0 m ( s p - ê m _ MN6402 MN6402 lf'-y T '^ -ê -fiS fflC M O S L S I O ne-C hip C M O S L S I V oice S y n th e s iz e r

ECHO canceller IC

Abstract: acoustic ECHO cancel ic SM7704 7603B1
Contextual Info: E2U0051-16-Y3 O K I Semiconductor MSM7603B Echo Canceller GENERAL DESCRIPTION The MSM7603B is an improved version of the MSM 7602 with basically the same configuration, and offers twice the cancelable echo delay time of the MSM7602. The MSM7603B is a low-power CMOS IC device for canceling echo in an acoustic system or

nju8101

Abstract: IJUB102K NJU8102D NJU8102K NJU8102M BIT1-10
Contextual Info: NJ U 8 10 2 10 BIT MONOLITHIC MULTIPLYING • GENERAL DESCRIPTION D/A CONVERTER ■ PACKAGE OUTLINE The NJU8102 is a high-performance monolithic multiply­ ing 10 bit D/A converter incorporated data latch. It can interface with any kinds of IC like as DTL, TTL

LA3101

Abstract: PC19060 Igus LD-310 LDL8 pci9080 80960Cx 93C06 I960CX NM93CS06
Contextual Info: PCI 9060 T E C December, 1995 VERSION 1.2 PCI Bus Master Interface Chip for Adapters and Embedded Systems Features General D escrip tio n _ • PCI Bus Master Interface supporting adapters and embedded systems • Two independent DMA channels for local

M6SS

Contextual Info: bbE D INTEGRATE» DEVICE M6SS771 G01E37T Ti|b • IDT CMOS CacheRAM 32k x 9-BIT 288K-BIT BURST COUNTER & SELF-TIMED WRITE IDT71589SA FEATURES: DESCRIPTION: • • • • • • • The IDT71589 is a very high-speed 32k x 9-bit static RAM with full on-chip hardware support of the 80486 CPU interface.

Contextual Info: A B W A N O B O N IP O R Q W O Q N in te i 82091AA ADVANCED INTEGRATED PERIPHERAL AIP • Single-Chip PC Compatible I/O Solution for Notebook and Desktop Platforms: — 82078 Floppy Disk Controller Core — Two 16550 Compatible UARTs — One Multi-Function Parallel Port

Contextual Info: X .250" Wiremount Socket . 125" Discrete Wire Version, 50 Position Backplane Connector Keying pinless shroud provides polarization Optional 3485-1900 Junction Shell Cover and body detail assist in discrete wire handling Special holes secure pinless shroud to back panel

LCX02

Abstract: 74LCX02 74LCX02M 74LCX02MTC 74LCX02MTCX 74LCX02MX 74LCX02SJ 74LCX02SJX
Contextual Info: LCX02 & National Semiconductor 74LCX02 Low Voltage Quad 2-Input NOR Gate with 5V Tolerant Inputs Supports live insertion/withdrawal 2.0V-3.6V Vqc supply operation 24 mA output drive Implements patented Quiet Series noise/EMI reduc­ tion circuitry Functionally compatible with 74 series 02

P87C575EHAA I

Abstract: P83C575EHPN 80C51 80C575 83C575 87C575 EC20D 2031h
Contextual Info: Philips Semiconductora Microcontroller Product 7 1 1 □ fl 2 b 0□bbb03 CMOS single-chip 8-bit microcontroller Product specification PHIN 80C575/83C575/87C575 • 80C51 based architecture - 8k x 8 ROM 83C575) - 8k x 8 EPROM (87C575) - ROMIess (80C575)

Contextual Info: A D V A NC E D POWER TECHNOLOGY 4*JE D • □ 5 S 7 S G ci A 0000305 d v a TST n c HAVP e d POWER ; T-3P \ - \ 5 Te c h n o lo g y APT601R3BN APT551R3BN APT601R6BN APT551R6BN „ POWER MOS IV™ 600V 550V 600V 550V 7.5A 7.5A 6.5A 6.5A 1.30 £2 1.30 £2

Contextual Info: Not Recommended for New Design Aug. 1994 Edition 1.0 FUJITSU DATA SHEET MB8 1 4 1 0 0 D -6 0 / - 7 0 CMOS 4M x 1 BIT FAST PAGE MODE DYNAMIC RAM CMOS 4,194,304 x 1 bit Fast Page Mode Dynamic RAM The Fujitsu MB814100D is a fully decoded CMOS Dynamic RAM DRAM that contains

Contextual Info: Spread Spectrum Frequency Timing Generator Features to pass increasingly difficult EMI testing without resorting to costly shielding or redesign. • Maximized EMI suppression using Cypress’s Spread Spectrum technology • Generates a spread spectrum 3X copy o f the input

Contextual Info: B U R R -B R O W N AFE1115 HDSL/MDSL ANALOG FRONT END WITH VCXO FEATURES • • • • • COMPLETE HDSL ANALOG INTERFACE • E1, T1 AND MDSL OPERATION • VCXO AND VCXO CONTROL CIRCUITRY +5V ONLY 5V or 3.3V Digital SCALEABLE DATA RATE 300mW POWER DISSIPATION

SOT225

Abstract: RGB15 Philips SAA713 CCIR-656 RGB24 SAA7145 87AD "Overflow detection" RGB16
Contextual Info: Philips Semiconductors Preliminary specification Multimedia PCI bridge SAA7145 accordance with CCIR-656 D1 or as a 16-bit port for backward compatibility with DMSD2. The DMSD2 format has luminance (Y) data on one 8 bit port and chrominance (U&V) data time multiplexed

kc 2462

Contextual Info: TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B TLC25L4Y, TLC25M4, TI.C25M4A, TLC25M4B, TLC25M4Y LinCMOS QUAD OPERATIONAL AMPLIFIERS ; _ A-Suffix Versions Offer 5-mV V|q _ D, N, OR PW PACKAGE TOP VIEW B-Suffix Versions Offer 2-mV V|q W ide Range of Supply Voltages

Contextual Info: së GEC P L E S S E Y o c o t b e r i 996 S E M I C O N D U C T O R S DS4214-3.4 DF654 FAST RECOVERY DIODE APPLICATIONS KEY PARAMETERS VBRM 3500V 675A F AV 6000A FSM 900|iC 6.5(is • Induction Heating. ■ A.C. Motor Drives. ■ Inverters And Choppers. ■

Contextual Info: GT-64060 IBBIBk « Galileo !»; Technology High-lntegration PCI Bridge/ Memory Controller P roduct Preview R evision 0.7 4/1/97 Please contact Galileo Technology for possible updates before finalizing a design. FEATURES • High-integration PCI bridge/memory controller with

Contextual Info: IB M 1 1 M 4 7 3 5 C IB M 1 1 M 4 7 3 5 C B 4M x 72 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • Optimized for ECC applications • System Performance Benefits: - • 4Mx72 Extended Data Out Page Mode DIMM • Performance:

Contextual Info: 19-0243, Rev0, 3/94 3 .0 V /3 .3 V M icroprocessor Supervisory C ircuits _G eneral Description These devices are designed for use in systems powered by 3.0V or 3 3V supplies. See the selector guide in the back of this data sheet for similar devices designed for

Contextual Info: ACTS20MS fi» HARRIS S E M I C O N D U C T O R Radiation Hardened Dual 4-Input NAND Gate May 1995 Features Pinouts 14 LEAD CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR, CDIP2-T14, LEAD FINISH C TOP VIEW 1.25 Micron Radiation Hardened S O S CM O S Total Dose 300K RAD Si

Contextual Info: Panasonic For Information Equipment MN5515 High-Speed Color Conversion LSI • Overview The MN5515 is a high-speed color conversion processor capable of free conversion among various full-color formats. It offers a low-cost solution to reproducing colors from

Contextual Info: KMM364Ë224AJ DRAM MODULE KMM364E224AJ Fast Page with EDO Mode 2Mx64 DRAM DIMM based on 1M x 1 6 ,1 K Refresh, 5V GENERAL DESCRIPTION FEATURES The Samsung KMM364F224AJ is a 2M bit X 64 Dynamic RAM high density memory module. The Samsung KMM364E224AJ consists of eight CMOS