8421 Search Results

14511BG

Abstract: MC14070 751B1 B110D MC14511BCPG
Contextual Info: MC14511B BCD-To-Seven Segment Latch/Decoder/Driver The MC14511B BCD−to−seven segment latch/decoder/driver is constructed with complementary MOS CMOS enhancement mode devices and NPN bipolar output drivers in a single monolithic structure. The circuit provides the functions of a 4−bit storage latch, an 8421

7448 bcd to seven segment decoder

Abstract: 74LS48D 74LS48p 7448 BCD to Seven Segment truth table for 7448 T13A3 7448 PIN OUT 7 segment with 7448 74LS48PC LS248
Contextual Info: 48 C O N N E C T IO N D IA G R A M P IN O U T A 5 4/7 4 48 y 5 4L S /74 L S 48 ^ a» BCD TO 7-SEGMENT DECODER |T 16] v c c A i [2 l t D E S C R IP T IO N — T he '48 tra n sla te s fo u r lines o f BC D 8421 in p u t data in to th e 7 -se g m e n t n u m eral co d e and p ro vid e s seven c o rre s p o n d in g o u tp u ts

14028B

Abstract: MC14028B CD4028B MC14028BCP MC14028BCPG MC14028BD MC14028BDG MC14028BDR2 14028BG
Contextual Info: MC14028B BCD−To−Decimal Decoder Binary−To−Octal Decoder The MC14028B decoder is constructed so that an 8421 BCD code on the four inputs provides a decimal one−of−ten decoded output, while a 3−bit binary input provides a decoded octal (one−of−eight)

DEI1054

Abstract: HI-8421 8421 HI-8424 HI-8422 8424 Holt HI-8421PSI HI-8421PST
Contextual Info: HI-8421, HI-8424 6-Channel / 8-Channel Discrete-to-Digital Interface Sensing 28V / Open Signals March 2003 DESCRIPTION FEATURES The HI-8421 is a six channel discrete-to-digital interface device.The HI-8424 has eight channels. Mixed-signal CMOS technology is used to provide superior low-power

54F160ADMQB

Abstract: 54F160A 54F160AFMQB 54F160ALMQB vm f160
Contextual Info: MILITARY DATA SHEET Original Creation Date: 03/15/96 Last Update Date: 07/30/96 Last Major Revision Date: 03/15/96 MN54F160A-X REV 1A0 SYNCHRONOUS PRESETTABLE BCD DECADE COUNTER General Description The F160A is a high-speed synchronous decade counter operating in the BCD 8421 sequence.

74ac190

Abstract: 74AC MC74AC190 p210n
Contextual Info: MC74AC190 Up/Down Counter with Preset and Ripple Clock UP/DOWN COUNTER WITH PRESET AND RIPPLE CLOCK The MC74AC190 is a reversible BCD 8421 decade counter which features synchronous counting and asynchronous presetting. The preset feature allows the MC74AC190 to be used in programmable dividers. The Count Enable input,

Contextual Info: AVG DDi Semiconductors Technical Data DV74LS190 DV74ALS190 DV74LS191 DV74ALS191 Synchronous Up/Down Decade and Binary Counters The 74LS/ALS 190 is a synchronous UP/DOWN BCD Decade counter 8421 The 74LS/ALS 191 is a synchronous UP/DOWN Modulo-16 Binary Counter. State changes of the counters are

Contextual Info: R C H U - P S E M IC O N D U C T O R tm DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs General Description Features The ’LS47 accepts fo u r lines of BC D 8421 input data, gen­ erates th e ir com plem ents internally and decodes the data

Contextual Info: MC14511B BCD-to-Seven Segment Latch/Decoder/Driver The MC14511B BCD−to−seven segment latch/decoder/driver is constructed with complementary MOS CMOS enhancement mode devices and NPN bipolar output drivers in a single monolithic structure. The circuit provides the functions of a 4−bit storage latch, an 8421

Contextual Info: MC14028B BCD-To-Decimal Decoder Binary-To-Octal Decoder The MC14028B decoder is constructed so that an 8421 BCD code on the four inputs provides a decimal one−of−ten decoded output, while a 3−bit binary input provides a decoded octal (one−of−eight)

Contextual Info: *7 0 / 4N54 Hermetic Hexadecimal Display With Logic Texas Optoelectronics, Inc. DESCRIPTION A hermetically sealed solid-state hexadecimal display with on-board memory latch, decoder and driver. The 4N54 decodes positive 8421 BCD logic inputs and displays the appropriate hexadecimal character

95h10

Contextual Info: 9507 QUAD AND/NAND 95H10 MSI BCD DECADE COUNTER u / q s c D E S C R IP T IO N The 9 5 H 1 0 is a high speed synchro nou sly presettable 8421 B C D decade counter. It is a synchronously presettable, m ulti­ function M S I building block useful for a large number of counting,

74LS192 truth table

Abstract: 74LS193 truth table 74LS192 PIN diagram 74ls193 74LS192 74LS192 INTERNAL DIAGRAM TTL 74ls193 74LS193 pin data 74LS192 table ttl 74ls192
Contextual Info: SN54/74LS192 SN54/74LS193 PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER PRESETTABLE BCD/ DECADE UP/ DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/ DOWN COUNTER The SN54/74LS192 is an UP/DOWN BCD Decade 8421 Counter and the SN54/74LS193 is an UP/DOWN MODULO-16 Binary Counter. Separate

BCD 8421

Contextual Info: S E M IC O N D U C T O R 74F190 Up/Down Decade Counter with Preset and Ripple Clock General Description Features The ’F190 is a reversible BCD 8421 decade counter featur­ ing synchronous counting and asynchronous presetting. The preset feature allows the ’ F190 to be used in programmable

14069U motorola

Abstract: mc14069ub motorola 14069u 14028B
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14028B BCD-To-Decimal Decoder Binary-To-Octal Decoder L SUFFIX CERAM IC CASE 620 The MC14028B decoder is constructed so that an 8421 BCD code on the four inputs provides a decimal o n e -o f-te n decoded output, while a 3 -b it

HI-8424

Abstract: DEI1054 HI-8424PTT HI-8421 HI-8421PSI HI-8421PST HI-8422 HI-8424PTI DS8421
Contextual Info: HI-8421, HI-8424 6-Channel / 8-Channel Discrete-to-Digital Interface Sensing 28V / Open Signals March 2007 DESCRIPTION FEATURES The HI-8421 is a six channel discrete-to-digital interface device.The HI-8424 has eight channels. Mixed-signal CMOS technology is used to provide superior low-power

Contextual Info: S E M I C O N D U C T O R -n 74F192 Up/Down Decade Counter with Separate Up/Down Clocks General Description The ’F192 is an up/down BCD decade 8421 counter. Sepa­ rate Count Up and Count Down Clocks are used, and in ei­ ther counting mode the circuits operate synchronously. The

Gray to excess-3 code conversion

Abstract: mc14028b decoder binary to bcd code excess-3 to gray code conversion
Contextual Info: MC14028B BCD−To−Decimal Decoder Binary−To−Octal Decoder The MC14028B decoder is constructed so that an 8421 BCD code on the four inputs provides a decimal one−of−ten decoded output, while a 3−bit binary input provides a decoded octal (one−of−eight)

7 segment 14-pin

Abstract: BCD 8421 10204 BCD 8421 application 54LS 54LS49 54LS49DMQB 54LS49FMQB C1995 J14A
Contextual Info: 54LS49 BCD to 7-Segment Decoder General Description The 54LS49 translates four lines of BCD 8421 input data into the 7-segment numeral code as shown in the Function Table It has open-collector outputs and is logically the 14pin verson of the ’48 without the lamp test and ripple blanking features Also see the ’LS249 data sheet

BCD 8421

Abstract: binary to BCD 8421 BCD 8421 application LS162 MC1455P1S synchronous counter using 4 flip flip 54LS160A 54LS160ADMQB 54LS160AFMQB 54LS160ALMQB
Contextual Info: 54LS160A DM74LS160A 54LS162A DM74LS162A Synchronous Presettable BCD Decade Counters General Description Features The ’LS160 and ’LS162 are high speed synchronous decade counters operating in the BCD 8421 sequence They are synchronously presettable for application in programmable dividers and have two types of Count Enable inputs plus

BCD 8421

Abstract: binary to BCD 8421 DM74 DM74LS196 DM74LS196M DM74LS196N LS196 M14A N14A
Contextual Info: LS196 National Semiconductor DM74LS196 Presettable Decade Counter General Description Features The ’LS196 decade ripple counter is partitioned into divideby-two and divide-by-five sections which can be combined to count either in BCD 8421 sequence or in a bi-quinary

Contextual Info: M M O T O R O L A SYNCHRONOUS PRESETTABLE BCD DECADE COUNTER The MC74F160A and MC74F162A are high-speed synchronous decade counters operating in the BCD (8421) sequence. They are synchronously pre­ settable for application in programmable dividers and have two types of Count

74F160A

Abstract: 74F160ASC 74F160ASJ 74F162A M16A 74F160APC
Contextual Info: s e m ic o n d u c t o r Revised July 1999 74F160A • 74F162A Synchronous Presettable BCD Decade Counter General Description Features T he 74F 160A and 74F162A are high-speed synchronous decade counters operating in th e BCD 8421 sequence. T h e y are synchronously presettable fo r applications in pro­

74AC192

Abstract: 74ac193 AC193 AC192 74AC Asynchronous up and down counter
Contextual Info: AC192 • AC193 54AC/74AC192 • 54AC/74AC193 Up/Down Counters with Separate Up/Down Clocks Description Connection Diagrams The ’AC192 is an up/down BCD decade 8421 counter. The 'AC193 is an up/down modulo-16 binary counter. Separate Count Up and Count