96011 Search Results

Contextual Info: CRYSTAL OSCILLATOR KSS D A T A E1102-96011-AA2 1997 .4 S H E E T V C X O - 275A D I M E N S I O N S [MODEL] VCXO- 275A : HC-MOS level crystal oscillator u n it: mm [FEATURES] 0 "Small Size" as small as 2.Occ. (20.8X13.08X7.46 mm) ° All-metal welded package .

Contextual Info: PD - 96011A IRF7805ZPbF HEXFET Power MOSFET Applications l High Frequency Point-of-Load Synchronous Buck Converter for Applications in Networking & Computing Systems. l VDSS : Qg typ. 30V 6.8m @VGS = 10V Lead-Free Benefits l Very Low RDS(on) at 4.5V VGS

Contextual Info: PD - 96011 IRF7805ZPbF HEXFET Power MOSFET Applications l High Frequency Point-of-Load Synchronous Buck Converter for Applications in Networking & Computing Systems. l VDSS RDS on max : 30V 6.8m @VGS = 10V Lead-Free 1 8 S 2 7 S 3 6 4 5 S Benefits l Very Low RDS(on) at 4.5V VGS

Contextual Info: PD - 96011A IRF7805ZPbF HEXFET Power MOSFET Applications l High Frequency Point-of-Load Synchronous Buck Converter for Applications in Networking & Computing Systems. l VDSS RDS on max : 30V 6.8m @VGS = 10V Lead-Free 1 8 S 2 7 S 3 6 4 5 S Benefits l Very Low RDS(on) at 4.5V VGS

SO402

Abstract: 74HC/HCT4066 LV4066 4066 SO14 74LV4066D 74LV4066DB 74LV4066N 74LV4066PW 74LV4066 lv4066 tssop14
Contextual Info: INTEGRATED CIRCUITS DATA SHEET FINAL DEVICE SPECIFICATION COMMERCIAL nr.: Dev. no: 74LV4066 LC705DV QUAD BILATERAL SWITCHES Rev. Date 940131 Issued by: T. Tieben 960119 12 + 3 Shs. 22554 Standard Logic Development NIJMEGEN PHILIPS SEMICONDUCTORS The Netherlands

Contextual Info: KSS E1102-96011-AA2 1997 .4 C R Y S T A L O S C I L L A T O R DA T A S H E E T V C X O - 275A [MODEL] V C X O - 275A D I M E N S I O N S : HC-MOS level crystal oscillator u n it : mm [FEATURES] ° "Small Size" as small as 2.Occ . (20.8X13.08X7.46 mm) 0 All-metal welded package .

Contextual Info: PD - 96011A IRF7805ZPbF HEXFET Power MOSFET Applications l High Frequency Point-of-Load Synchronous Buck Converter for Applications in Networking & Computing Systems. l VDSS : Qg typ. 30V 6.8m @VGS = 10V Lead-Free Benefits l Very Low RDS(on) at 4.5V VGS

Q3236

Abstract: PE9601 PE9601EK 9601-11 96011
Contextual Info: Product Specification PE9601 2200 MHz UltraCMOS Integer-N PLL for Rad Hard Applications Product Description Peregrine’s PE9601 is a high performance integer-N PLL capable of frequency synthesis up to 2200 MHz. The device is designed for superior phase noise performance while

UltraSPARC ii

Abstract: PI-275 UltraSPARC IIIi
Contextual Info: S un M icroelectronics July 1997 FFB DATASHEET High Performance UPA Based 24-bit Frame Buffer D e s c r ip t io n The Fast Frame Buffer FFB is a high performance UPA based 24-bit frame buffer with an integer rendering pipeline for use in demanding graphic applications. It is a UPA slave-only, non-cached, PIO graphics output

mrf250

Abstract: fuse 6.3A 250v Fuse 250V 3.15A
Contextual Info: Type MRF Fast Acting Radial Lead Micro Fuse Series Catalog Number MRF 50 Electrical Characteristics IEC-127-3 STANDARD SHEET 3 Rated Current 50mA to 6.3A inclusive Approvals 1.5 In 2.1 In 2.75 In 10 In MIN MAX MIN MAX MIN MAX MAX 1 hr. 30 min. 10 ms 3 sec

IEC-127-3

Abstract: EIA-468 208H 210F 213B fuse radial f 63mA
Contextual Info: Type MRF Fast Acting Radial Lead Micro Fuse Series EMRFD1005A1 Catalog Number Electrical Characteristics IEC-127-3 STANDARD SHEET 3 Rated Current 50mA to 6.3A inclusive 1.5 In 2.1 In 2.75 In 10 In MIN MAX MIN MAX MIN MAX MAX 1 hr. 30 min. 10 ms 3 sec 3 ms

RD13D

Contextual Info: D A TA S H E E T PM PMC-960758 ISSUE 5 PMC-Sierra,Inc. PM7364 f r e e d m -32 FRAME ENGINE AND DA TA U N K MANA GER PM7364 FREEDM -32 FRAME ENGINE AND DATALINK MANAGER DATA SHEET ISSUE 5: MAY 1998 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE

MO-001

Contextual Info: Philips Sem iconductors Product specification Quad 2-input OR gate TYPE 74ALS32 TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 5.0ns 2.3m A PIN CONFIGURATION KJ 1A [T 74ALS32 1B [T ORDERING INFORMATION O RDER CODE CO M M E R C IA L RANGE V cc = 5V ±10%,

BY575

Abstract: 28BZ 8 PINS J-354W display 16119
Contextual Info: 501-4126 3D 501-4127 (2D) July 1997 FFB DATA SHEET High Performance UPA Based 24-bit Frame Buffer DESCRIPTION The Fast Frame Buffer (FFB) is a high performance UPA based 24-bit frame buffer with an integer rendering pipeline for use in demanding graphic applications. It is a UPA slave-only, non-cached, PIO graphics output

QML-38535

Abstract: AD677
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET REV SHEET REV STATUS OF SHEETS PMIC N/A STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE REV SHEET 4 5 PREPARED BY Dan UonnelI

74AC125

Abstract: 74ACT125 IEC134 MS-012AB SSOP14
Contextual Info: Powered by ICminer.com Electronic-Library Service CopyRight 2003 P hilips S e m ic o n d u c to rs P ro d u ct sp e cifica tio n 7 4 A C 1 2 5 Quad buffer/line driver 3-state 7 4 A C T PIN CONFIGURATION 1DË | 1 LOGIC SYMBOL (IEEE/IEC) u 14 | V cc 1A | 2

6 pin 2D 1002

Abstract: 74LV74 2d 1002 6 pin 74LV74PW 2D 1002
Contextual Info: Philips Semiconductors Product specification Dual D-type flip-flop with set and reset; positive edge-trigger 74LV74 FEATURES DESCRIPTION • W ide operating voltage: 1.0 to 5.5V The 74LV74 is a low-voltage Si-gate CMOS device and is pin and function com patible with 74HC/HCT74.

SMD l4fl

Abstract: smd TRANSISTOR code marking w2 qml-38535 CDFP4-F16 40109B Transistor SMD a7s transistor 5Cv smd
Contextual Info: REVISIONS DESCRIPTION LTR DATE YR-MO-DA APPROVED REV SHEET REV SHEET 15 16 REV STATUS OF SHEETS PMIC N/A STANDARD M ICRO CIRCUIT DRAW ING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE REV SHEET 8 10 11 12

qml-38535

Abstract: GDIP1-T16
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED Changes in accordance with NOR 5962-R035-96. 96-01-11 M. A. Frye Changes in accordance with NOR 5962-R013-99. 98-10-28 R. Monnin Changes in accordance with NOR 5962-R015-99 98-11-25 R. Monnin Changes to digital input capacitance and voltage output slew rate tests in table I.

DS1267

Abstract: P-17298
Contextual Info: RELIABILITY MONITOR PRODUCT MONITOR DATE DATE CODE ASSEMBLY FACILITY ASSEMBLY LOT NO PROCESS TYPE PACKAGE TYPE DS1267 Apr-96 9612 A1 HYUNDAI DL603183AAL 1.2µ OX/NI 16 SOIC STRESS/JOB NO. Preconditioning P/C : HTC Vapor Phase P-17251 READPOINT (Sample Size/No. of Fails)

74LV27

Abstract: 74LV27PW
Contextual Info: Philips Semiconductors Product specification Triple 3-input NOR gate 74LV27 FEATURES DESCRIPTION • W ide operating voltage: 1.0 to 5.5 V The 74LV27 is a low-voltage Si-gate CMOS device and is pin and function com patible with 74HC/HCT27. • Optim ized for Low Voltage applications: 1.0 to 3.6 V

dual jk flipflop

Abstract: 74LV107 74LV107PW MS-012AB
Contextual Info: Philips Semiconductors Product specification Dual JK flip-flop with reset; negative-edge trigger 74LV107 FEATURES DESCRIPTION • W id e o p e ra tin g : 1.0 to 5.5 V T h e 74 L V 1 0 7 is a lo w -v o lta g e S i-g a te C M O S d e v ic e th a t is pin a n d

74LV32

Abstract: 74LV32PW MS-012AB
Contextual Info: Philips Semiconductors Product specification Quad 2-input OR gate 74LV32 FEATURES DESCRIPTION • W ide operating voltage: 1.0 to 5.5 V The 74LV32 is a low-voltage Si-gate CMOS device and is pin and function com patible with 74HC/HCT32. • Optim ized for Low Voltage applications: 1.0 to 3.6 V

74LVT

Abstract: 74LVT00 74LVT00D 74LVT00PW
Contextual Info: Philips Semiconductors Product specification 3.3V Quad 2-input NAND gate 74LVT00 QUICK REFERENCE DATA SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT tpLH tpHL Propagation delay An or Bn to Yn CL = 50pF; V cc = 3-3V C|N Input capacitance V, = 0V or 3.0V