990MW Search Results

BE423

Contextual Info: TOSHIBA TC5118325BJ/BFT-70 PRELIMINARY 524,288 WORD X 32 BIT EDO DYNAMIC RAM Description The TC5118325BJ/BFT is the Hyper Page Mode (EDO) dynamic RAM organized 524,288 words by 32 bits. The TC5118325BJ/BFT utilizes Toshiba’s CMOS silicon gate process technology as well as advanced circuit techniques to pro­

pfc8574

Abstract: ENC 03 LTC2272 marking code s4 diode op amp marking P3 JESD204 LTC2273
Contextual Info: LTC2273/LTC2272 16-Bit, 80Msps/65Msps Serial Output ADC DESCRIPTION FEATURES n High Speed Serial Interface JESD204 Sample Rate: 80Msps/65Msps 77.7dBFS Noise Floor 100dB SFDR SFDR >90dB at 140MHz (1.5VP-P Input Range) PGA Front End (2.25VP-P or 1.5VP-P Input Range)

TC5118165

Abstract: TC5118165BFT
Contextual Info: INTEGRATED TO SH IB A M O S D IG ITA L INTEG RATED CIRCUIT CIRCUIT T C 5 1 1 8 1 6 5 BJ / B F T - 60 T C 5 1 1 8 1 6 5 BJ / BFT - 70 TOSHIBA TECHNICAL TE N TA TIV E D A T A 1 ,0 4 8 ,5 7 6 W O R D x DATA SILICON GATE C M O S 16 BIT HYPER PAGE ED O D Y N A M IC R A M

IN4010

Contextual Info: LG Semicon. Co. LTD Description Features The GMM781000ENS is an 1M x 8 bits Dynamic RAM Module which is assembled 2 pieces of 4M bit DRAM GM71C4400EJ, 1M x4 sealed in 20 pin SOJ package. The GMM781000ENS is a socket type memory module, suitable for easy change or addition

M7810

Abstract: DNS-80 GM71C4
Contextual Info: LG Semicon. Co. LTD. Description Features The GMM781000DNS is an 1M x 8 bits Dynamic RAM Module which is assembled 2 pieces of 4M bit DRAM GM71C4400DJ, 1M x4 sealed in 20 pin SOJ package. The GMM781000DNS is a socket type memory module, suitable for easy change or addition

TK 69 TSOP

Abstract: 1024KX16 M5M4V16169RT-10 1-OF-128 7WB1 AD011 M5M4V16169TP-10
Contextual Info: MITSUBISHI LSIs TARGET SPEC REV. 2.0 M5M4V16169RT-10,-12,-15 16MCDRAM:16M(1024K-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM Preliminary This document is a preliminary Target Spec. and some of the contents are subject to change without notice.

CXK581020AJ

Abstract: CXK581020AJ-25 32PIN CXK581020AJ-20 CXK58102QAJ scu32
Contextual Info: SONY CXK581020AJ 131072-words x 8-bits High Speed CMOS Static RAM Description The CXK581020AJ is a high speed CM O S static 32 pin S O J Plastic RAM organized as 131072-words by 8 bits. It operates at 20ns/25ns access time from 5V single power supply. The CXK581020AJ is suitable for use in high

HSOP25

Abstract: BH9595 BH9595FP-Y
Contextual Info: BH9595FP-Y Multimedia ICs SCSI active terminator BH9595FP-Y These SCSI active terminators, developed as a substitute for conventional discrete terminators, maintain good consistency between VM level 2.85V and GND level (0V) and between VM level and VDD level, and have extremely

bh9598

Abstract: BH9598AFP-Y HSOP25
Contextual Info: BH9598AFP-Y マルチメディア IC SCSI アクティブターミネータ BH9598AFP-Y この SCSI アクティブターミネータは従来のディスクリート型終端抵抗を置き換えUltra Fast SCSI に対応したもので す。VM Level 2.60V と GND Level に対して、良好な整合性を保持しており、消費電力は非常に小さく、待機時にお

470uF capacitor

Abstract: TS5215
Contextual Info: TS5215 300mA Low Noise LDO Voltage Regulator with Enable Low Power Consumption Low Drop Out Voltage 0.35V Fixed and Adjustable Output Enable Shutdown General Description The TS5215 series is an efficient linear voltage regulator with ultra low noise output, very low dropout voltage typically

27BSC

Abstract: TS5215 TS5215CX5
Contextual Info: TS5215 300mA Low Noise LDO Voltage Regulator with Enable SOT-25 Pin Definition: 1. Input 2. Ground 3. Enable 4. Bypass / Adjust 5. Output SOT-89-5L SOP-8 Pin Definition: 1. Bypass / Adjust 2. Ground 3. Enable 4. Input 5. Output Pin Definition: 1. Enable 2. Input

Contextual Info: X98014 I GNS DE S W E T OR N DUC E D F TE P R O D N TI TU MME ECO E SUBS 01-140 Data Sheet R T NO SIBL ISL980 PO S December 19, 2005 140MHz Triple Video Digitizer with Digital PLL FN8217.1 Features • 140MSPS maximum conversion rate The X98014 3-channel, 8-bit Analog Front End (AFE)

00-KX02

Contextual Info: GMM781000CNS-60/70/80 LG Semicon Co.,Ltd. Description 1,048,576 WORDS x 8 BIT CMOS DYNAMIC RAM MODULE Features The GMM781000CNS is an 1M x 8 bits Dynamic RAM Module which is assembled 2 pieces of 4M bit DRAM GM71C4400CJ, 1M x4 sealed in 20 pin SOJ package. The

Contextual Info: TS5215 300mA Low Noise LDO Voltage Regulator with Enable SOT-25 Pin Definition: 1. Input 2. Ground 3. Enable 4. Bypass / Adjust 5. Output SOT-89-5L SOP-8 Pin Definition: 1. Bypass / Adjust 2. Ground 3. Enable 4. Input 5. Output Pin Definition: 1. Enable 2. Input

tc5118165bj

Abstract: TC5118165B TC5118165 ct rac 70 TC5118165BFT
Contextual Info: TOSHIBA TC5118165BJ/BFT60/70 PRELIM INARY 1,048,576 W O RD X 16 BIT HYPER PAGE EDO DYNAMIC RAM Description The TC5118165BJ/BFT is the hyper page (EDO) dynamic RAM organized 1,048,576 words by 16 bits. The TC5118165BJ/ BFT utilizes Toshiba's CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operat­

TC5118325B

Abstract: mx c511 tc5118325
Contextual Info: TOSHIBA TC5118325BJ/BFT-70 PRELIMINARY 524,288 W ORD X 32 BIT EDO DYNAMIC RAM Description The TC5118325BJ/BFT is the Hyper Page Mode (EDO) dynamic RAM organized 524,288 words by 32 bits. The TC5118325BJ/ BFT utilizes Toshiba’s CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operating

Contextual Info: O K I Semiconductor MSM514265B/BSL 262,144-Word x 16-Bit DYNAMIC RAM : HYPER PAGE MODE TYPE D ESC R IP T IO N T h e M SM 5 1 4 2 6 5 B/BSL is a n e w generation D yn am ic R A M org an ized as 262,144-word x 16-bit configuration. T h e technology used to fabricate the M SM 5 1 4 2 6 5 B/BSL is O K I's C M O S silico n gate process

ras 0515

Abstract: BNS-60
Contextual Info: LG Semicon. Co. LTD. Description Features The GMM781000BNS is an 1M x 8 bits Dynamic RAM Module which is assembled 2 pieces of 4M bit DRAM GM71C4400BJ, 1M x 4 sealed in 20 pin SOJ package. The GMM781000BNS is a socket type memory module, suitable for easy change or addition

idt7m864

Abstract: idt6116s IDT6116 7MA64 7m864
Contextual Info: 64K 8K X 8 C M O S STATIC RAM PAK A ID T 7 M 8 6 4 ID T 8 M 8 6 4 FEATURES: • Equivalent to JEOEC standard 8K x 8 monolithic RAM • 8,192 x 8 CMOS static RAM module complete w ith decoder and decoupling capacitor • High-speed 65 (commercial only) 75/85/120/150/200ns

Contextual Info: 1M x 8 SRAM MODULE SYS81000FKX - 55/70/85/10/12 Elm Road, West Chirton Industrial Estate, North Shields, NE29 8SE, ENGLAND. TEL +44 0191 2930500. FAX +44 (0191) 2590997 Issue 2.4 : February 1999 Description Features The SYS81000FKX is a plastic 8 Mbit Static RAM

tc5118165bj

Abstract: TC5118165 TC5117405 SOJ42-P-400 TC5117405BSJ hidden refresh TSOP70-P-400 TC51181 TC5118 TOSHIBA TSOP50-P-400
Contextual Info: TOSHIBA TC5116405BSJ/BST-60 TC5116405BSJ/BST-70 PRELIMINARY 4,194,304 WORD X 4 BIT EDO DYNAMIC RAM Description The TC5116405BSJ/BST is the Hyper Page Mode (EDO) dynamic RAM organized as 4,194,304 words by 4 bits. The TC5116405BSJ/BST utilizes Toshiba’s CMOS Silicon gate process technology as well as advanced circuit techniques to provide wide

MB85303

Contextual Info: February 1993 Edition 1.0 FUJITSU DATA SHEET MB85303A-60/-70/-80 CMOS 1M x 8 Fast Page Mode DRAM Module CMOS 1,048,576 x 8 Bit Fast Page Mode DRAM Module The Fujitsu MB85303A is a fully decoded CMOS Dynamic Random Access Memory DRAM Module consisting of two MB814400A devices.

CA3098E

Contextual Info: JAN 1 fl 1993 a* HARRIS CA3098 \J \J \J S E M I C O N D U C T O R January Programmable Schmitt Trigger - with Memory Dual Input Precision Level Detectors 1993 Features • Description Programmable Operating Current The CA3098 Programmable Schmitt Trigger is a monolithic

Contextual Info: MITSUBISHI LSIs M 5 M 4 V 1 6 1 6 9 T P - 1 0 ,- 1 2 ,- 1 5 16M CDRAM16M 1024K-WORD BY 16-BIT CACHED DRAM WITH 16K(1024-WORD BY 16-BIT)SRAM DESCRIPTION The M5M4V16169TP is a 16M-bit Cached DRAM which integrates input registers, a 1048576-word by 1 6 - bit