AUG06 Search Results

Contextual Info: 3 4 THIS DRAWING IS UNPUBLISHED. COPYRIGHT RELEASED BY TYCO ELECTRONICS CORPORATION. FOR PUBLICATION - 2 - LOC ALL RIGHTS RESERVED. REVISIONS DIST GP 00 LTR DESCRIPTION A 4.06 — [. 1 6 0 ] TYP DATE DWN 2 1 AUG06 REVISED PER E C O -06- 000724 APVD JDP CWR

U77-1163-2010P

Contextual Info: 8 7 4 5 6 3 2 1 REVISIONS REV DESC RIPTIO N DATE A PROPOSAL AUG06/09 B PLATING OPTION CONFIGURATION AUG17/09 SFP+ PRESS FIT CAGE P/N: U77-1163-2010P IF ORDERED SEPERATELY APPRD D D 16.26 15.01 SFP+ PRESS FIT CAGE (P/N: U77-A1639-X001 IF ORDERED SEPERATELY)

Contextual Info: A B C D E G F H REVISIONS 5.00 [.197] DEEP THREADED HOLES SEE ORDERING CODE THREAD OPTION 2.50 .098 1 5.28 .208 REV DESCRIPTION, ECN, EAR NO. DATE APP'D F PRODUCT DRAWING EAR 14113 AUG23/12 K.L. G PRODUCT DRAWING (EAR 14292) AUG06/14 K.L. 1 ORDERING CODE: M U S B - E 1 5 1 - X X

M/SMD w410

Contextual Info: 8 7 4 5 6 3 2 1 REVISIONS REV DESC RIPTIO N DATE A PROPOSAL AUG06/09 B PLATING OPTION CONFIGURATION AUG17/09 SFP+ PRESS FIT CAGE P/N: U77-1163-2010P IF ORDERED SEPERATELY APPRD D D 16.26 15.01 SFP+ PRESS FIT CAGE (P/N: U77-A1639-X001 IF ORDERED SEPERATELY)

Contextual Info: 4 TH IS DRAWING IS U N P U B LIS H E D . RELEASED FOR PUBLICATIO N ALL COPYRIGHT 2 3 RIGHTS - - LOC RESERVED. DIST EH BY TYCO ELECTRONICS CORPORATION. REVISIONS 00 LTR D E SC RIPTIO N DWN DATE APVD D1 ECO—0 6 —0 1 0 6 4 9 0 1 AUG06 JM c c D2 REV 11DCT06

Contextual Info: THIS DRAWING IS UNPUBLISHED. COPYRIGHT - RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. DIST LOC ALL RIGHTS RESERVED. REVISIONS J LTR B2 DESCRIPTION REDRAW W /0 CHANGE DWN DATE E C R -0 6 -0 1 8497 APVD MS KB 01AUG 06 6. 2 L ±0. 3 3. 6 l. 8 3.

P4C174

Contextual Info: P4C174 HIGH SPEED 8K x 8 CACHE TAG STATIC RAM FEATURES High Speed Address-To-Match - 8 ns Maximum Access Time Data Retention at 2V for Battery Backup Operation High-Speed Read-Access Time Advanced CMOS Technology – 8/10/12/15/20/25 ns Commercial – 15/20/25 ns (Military)

cache tag Static RAM

Contextual Info: FT6175 High Speed 8K x 8 Cache Tag Static Ram FEATURES High Speed Address-To-Match - 8 ns Maximum Access Time Data Retention at 2V for Battery Backup Operation High-Speed Read-Access Time Advanced CMOS Technology – 8/10/12/15/20/25 ns Commercial – 15/20/25 ns (Military)

Contextual Info: P4C1026 ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell TTL/CMOS Compatible Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) – 20/25/35 ns (Military) Fully TTL Compatible Inputs Standard Pinout (JEDEC Approved)

Contextual Info: P4C1026 REVISIONS DOCUMENT NUMBER: DOCUMENT TITLE: SRAM127 P4C1026 ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM REV. ISSUE DATE ORIG. OF CHANGE OR Oct-05 JDB New Data Sheet A Aug-06 JDB Updated SOJ package information Document # SRAM127 REV A DESCRIPTION OF CHANGE

Contextual Info: P4C174 REVISIONS DOCUMENT NUMBER: DOCUMENT TITLE: SRAM118 P4C174 HIGH SPEED 8Kx8 CACHE TAG STATIC RAM REV. ISSUE DATE ORIG. OF CHANGE OR 1997 DAB New Data Sheet A Oct-05 JDB Change logo to Pyramid B Nov-05 JDB Corrected error in Selection Guide C Aug-06 JDB

Contextual Info: P4C164 REVISIONS DOCUMENT NUMBER: DOCUMENT TITLE: SRAM115 P4C164 ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAMS REV. ISSUE DATE ORIG. OF CHANGE OR 1997 DAB New Data Sheet A Oct-05 JDB Change logo to Pyramid B Jun-06 JDB Added 28-pin ceramic DIP C Aug-06 JDB Added Lead Free Designation

Contextual Info: P4C1256 HIGH SPEED 32K x 8 STATIC CMOS RAM FEATURES Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology Fast tOE Automatic Power Down Packages —28-Pin 300 mil DIP, SOJ, TSOP —28-Pin 300 mil Ceramic DIP —28-Pin 600 mil Ceramic DIP —28-Pin CERPACK

Contextual Info: P4C1026 ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell TTL/CMOS Compatible Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) – 20/25/35 ns (Military) Fully TTL Compatible Inputs Standard Pinout (JEDEC Approved)

Contextual Info: P4C1256L LOW POWER 32K x 8 STATIC CMOS RAM FEATURES Common Data I/O Three-State Outputs Fully TTL Compatible Inputs and Outputs Advanced CMOS Technology Automatic Power Down Packages —28-Pin 600 mil DIP —28-Pin 300 mil CERDIP —28-Pin 330 mil Narrow SOP

BDP955

Abstract: BDP951 BDP952 BDP953 BDP956 VPS05163
Contextual Info: BDP951 . BDP955 NPN Silicon AF Power Transistor
For AF driver and output stages 4
High collector current
High current gain
Low collector-emitter saturation voltage 3
Complementary types: BDP952 . BDP956 PNP 2 1 Type Marking Pin Configuration

HDSP-7301

Abstract: 7 Segment Displays
Contextual Info: 7.6 mm 0.3 inch Micro Bright Seven Segment Displays HDSP-730X Series HDSP-731X Series HDSP-740X Series HDSP-750X Series HDSP-780X Series HDSP-A15X Series Technical Data Features • Available with Colon for Clock Display • Compact Package 0.300 x 0.500 inches

marking code p18

Abstract: AUG04A48 AUG06F48 AUG07G48 AUG08M48 AUG08Y48 CISPR22 GMA-10A
Contextual Info: Technical Reference Note Ultra Low Profile AUG 20W Series AUG 20W Ultra Low Profile DC – DC Module Pb-free reflow compatible and ROHS Compliant The AUG 20W series is Astec’s new Ultra Low Profile, 48Vin, SMT isolated single output modules. With the Ultra Low

P4C1026

Abstract: P4C1258
Contextual Info: P4C1026 ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell TTL/CMOS Compatible Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) – 20/25/35 ns (Military) Fully TTL Compatible Inputs Standard Pinout (JEDEC Approved)

P4C163

Abstract: P4C163L
Contextual Info: P4C163/P4C163L ULTRA HIGH SPEED 8K x 9 STATIC CMOS RAMS FEATURES Data Retention with 2.0V Supply, 10 µA Typical Current P4C163L Military Common I/O Fully TTL Compatible Inputs and Outputs Standard Pinout (JEDEC Approved) – 28-Pin 300 mil DIP, SOJ – 28-Pin 350 x 550 mil LCC

P3C1256

Abstract: 1519B
Contextual Info: P3C1256 HIGH SPEED 32K x 8 3.3V STATIC CMOS RAM FEATURES 3.3V Power Supply Common Data I/O High Speed Equal Access and Cycle Times — 12/15/20/25 ns (Commercial) — 15/20/25 ns (Industrial) Three-State Outputs Low Power Advanced CMOS Technology Single 3.3 Volts ±0.3Volts Power Supply

100DM

Abstract: 1519B P4C164 P4C164L
Contextual Info: P4C164 ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Common Data I/O High Speed Equal Access and Cycle Times – 8/10/12/15/20/25/35/70/100 ns (Commercial) – 10/12/15/20/25/35/70/100 ns(Industrial) – 12/15/20/25/35/45/70/100 ns (Military)

Contextual Info: P4C164 ULTRA HIGH SPEED 8K x 8 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Common Data I/O High Speed Equal Access and Cycle Times – 8/10/12/15/20/25/35/70/100 ns (Commercial) – 10/12/15/20/25/35/70/100 ns(Industrial) – 12/15/20/25/35/45/70/100 ns (Military)

Contextual Info: P4C1981/1981L, P4C1982/1982L REVISIONS DOCUMENT NUMBER: DOCUMENT TITLE: SRAM114 P4C1981 / P4C198L, P4C1982 / P4C1982L ULTRA HIGH SPEED 16K x 4 STATIC CMOS RAMS REV. ISSUE DATE ORIG. OF CHANGE OR 1997 DAB New Data Sheet A Oct-05 JDB Change logo to Pyramid B