DS1035 Search Results

"Delay Lines"

Abstract: DS1035 IEEE-488 precision waveform generator 74F04 DS1013 DS1033 DS1035M DS1035Z
Contextual Info: DS1035 DS1035 3–in–1 High–Speed Silicon Delay Line FEATURES PIN ASSIGNMENT • All–silicon timing circuit • Three independent buffered delays • Stable and precise over temperature and voltage IN1 1 8 VCC IN2 2 7 OUT1 IN3 3 6 OUT2 GND 4 5 OUT3 • Leading

DS1425L-F5

Abstract: rtc ds1307 dallas ds2501 dallas ds2501 Datasheet dallas ds1280 DS2501 ds1642-150 DS1669 replacement ds2501 Datasheet DS1608S
Contextual Info: ORDERING INFORMATION DEVICE DS0621–SDK DS0630 DS1000 DS1000–IND DS1003 DS1004 DS1005 DS1007 DS1010 DS1012 DS1013 DS1020 DS1021 DS1033 DS1035 DS1040 PACKAGE TYPE Software Software 14–Pin DIP 8–Pin DIP 16–Pin SOIC 8–Pin SOIC 8–Pin DIP 8–Pin SOIC

Contextual Info: MachXO2 Family Data Sheet DS1035 Version 2.6, July 2014 MachXO2 Family Data Sheet Introduction February 2014 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only

R2550-1

Abstract: GSFC
Contextual Info: FC SHORT FORM FACTOR / HIGH RELIABILITY FIBER OPTIC CONNECTORS Cage Code: 91293 DS1035 0010 *Tested in accordance with GSFC modified TIA FOTP-II vibration test procedure and continuously monitored during the test for insertion loss. Test configuration consisted of:

DS1035

Abstract: DS1013 DS1033 DS1035-10 DS1035-12 DS1035-15 DS1035M DS1035Z
Contextual Info: DS1035 3-in-1 High–Speed Silicon Delay Line www.dalsemi.com FEATURES All-silicon timing circuit Three independent buffered delays Stable and precise over temperature and voltage Leading and trailing edge precision preserves the input symmetry Standard 8-pin DIP and 8-pin SOIC 150 mil

MACHXO2 7000 pinout

Abstract: MachXO2-4000
Contextual Info: MachXO2 Family Data Sheet DS1035 Version 02.3, December 2013 MachXO2 Family Data Sheet Introduction January 2013 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only

Contextual Info: MachXO2 Family Data Sheet DS1035 Version 02.1, June 2013 MachXO2 Family Data Sheet Introduction January 2013 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only

DS1035

Abstract: 74F04 DS1013 DS1033 DS1035M DS1035Z
Contextual Info: DS1035 DS1035 3–in–1 High–Speed Silicon Delay Line FEATURES PIN ASSIGNMENT • All–silicon timing circuit • Three independent buffered delays • Stable and precise over temperature and voltage IN1 1 8 VCC IN2 2 7 OUT1 IN3 3 6 OUT2 GND 4 5 OUT3 • Leading

LCMX02 1200

Abstract: LCMX02 LCMX02 256 LCMX02 640 MACHXO2 1200 pinout file LCMXO2-1200HC-4MG132C MACHXO2 7000 pinout file MACHXO2-1200ZE LCMXO2-7000 LCMXO2-2000
Contextual Info: MachXO2 Family Data Sheet DS1035 Version 01.8, March 2012 MachXO2 Family Data Sheet Introduction March 2012 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only

DS1035

Contextual Info: DS1035 DALLAS s e m ic o n d u c to r DS1035 3—in—1 H igh-Speed Silicon Delay Line PIN ASSIGNMENT FEATURES • All-silicon timing circuit • Three independent buffered delays • Initial delay tolerance ±1.5 ns • Stable and precise over temperature and voltage

Contextual Info: DS1035 DALLAS DS1035 seiSic o Ñd u c t o r 3—in—1High-Speed Silicon Delay Line PIN ASSIGNMENT FEATURES • All-silicon timing circuit IN2 C • Initial delay tolerance ±1.5 ns • Stable and precise over temperature and voltage 1 8 1 7 1 2 IN1QE 1 OUT1

dallas date code

Abstract: E50501 E505 DS1013 DS1035 DS1044
Contextual Info: DALLAS SEMICONDUCTOR 4401 South Beltwood Parkway Dallas, Texas 75244–3292 214 450–0400 Date: July 10, 1995 To: Subject: PRODUCT CHANGE NOTICE – E50501 Description: DS1035 B to C Die Revision Change The attached letter has been generated as a part of the Dallas Semiconductor Product Change Notification Procedure. Please insure that it gets to the correct person at the customer’s facility. We are asking

lcmxo2-1200

Abstract: LCMXO2-2000 LCMXO2-256 LCMXO2-4000 LCMXO2-640 LCMXO2-256HC-4TG100I LCMXO2-7000 MACHXO2 7000 pinout file MachXO2-1200 LCMXO2-2000HC-4BG256C
Contextual Info: MachXO2 Family Data Sheet Advance DS1035 Version 01.0, November 2010 MachXO2 Family Data Sheet Introduction November 2010 Features Advance Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks per edge for high-speed 

Contextual Info: MachXO2 Family Data Sheet DS1035 Version 02.4, February 2014 MachXO2 Family Data Sheet Introduction February 2014 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only

Contextual Info: MachXO2 Family Data Sheet Preliminary DS1035 Version 01.5, August 2011 MachXO2 Family Data Sheet Introduction April 2011 Features Preliminary Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O 

DS1035

Abstract: DS1013 DS1033 DS1035-10 DS1035-12 DS1035-15 DS1035-6 DS1035-8 DS1035M DS1035Z
Contextual Info: DS1035 3-in-1 High-Speed Silicon Delay Line ww w.dalsem i.com PIN ASSIGNMENT FEATURES • All-silicon timing circuit ■ Three independent buffered delays ■ Stable and precise over temperature and voltage ■ Leading and trailing edge precision preserves

LCMXO2-4000HC

Abstract: LCMX02 Lattice XO2 LCMXO2-4000 LCMX02 1200 wishbone HE 021 LCMX02-2000 CABGA 17 x 17 thermal resistance lcmxo2 7000he pcb layout
Contextual Info: MachXO2 Family Data Sheet DS1035 Version 01.7, February 2012 MachXO2 Family Data Sheet Introduction February 2012 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only

DS1669-100

Abstract: TQFP 100 pin Socket 4 pin dip switch DS2401 PACKAGE 16 pin DIP socket DS1804 NV 2 pin dip switch ds1232(ind) data sheet ds1642-150 DS1620S
Contextual Info: ORDERING INFORMATION DEVICE DS0621–SDK DS1000 DS1000–IND DS1003 DS1004 DS1005 DS1007 DS1010 DS1012 DS1013 DS1020 DS1021 DS1033 DS1035 DS1040 PACKAGE TYPE Software 14–Pin DIP 8–Pin DIP 16–Pin SOIC 8–Pin SOIC 8–Pin DIP 8–Pin SOIC 14–Pin DIP

DS1035

Contextual Info: DS1035 DALLAS SEMICONDUCTOR DS1035 3—in—1 High-Speed Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon timing circuit • Three independent buffered delays • Stable and precise over temperature and voltage • Leading and trailing edge precision preserves the

1035Z

Abstract: 1033 aka
Contextual Info: DS1035 DALLAS SEMICONDUCTOR D S1035 3— in— 1 H i g h - S p e e d Silicon Delay Line FEA TU R E S PIN A S S IG N M E N T • A ll-s ilic o n timing circuit * Three i n d e p e n d e n t buffered de la ys • Initial de lay toler an ce ±2 ns in 1 n n -L U

Contextual Info: MachXO2 Family Data Sheet DS1035 Version 02.0, January 2013 MachXO2 Family Data Sheet Introduction January 2013 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only

LCMX02

Abstract: LCMX02 1200 LCMXO2-1200HC-4TG144C LCMXO2-4000HC LCMXO2-1200HC-4MG132C lcmxo2-1200 TQFP-144 footprint LCMXO2-7000HC LCMXO2-640HC-4TG100C LCMX02-2000
Contextual Info: MachXO2 Family Data Sheet Preliminary DS1035 Version 01.5, August 2011 MachXO2 Family Data Sheet Introduction April 2011 Features Preliminary Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O 

Contextual Info: MachXO2 Family Data Sheet DS1035 Version 02.0, January 2013 MachXO2 Family Data Sheet Introduction January 2013 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only

LCMXO2-4000

Abstract: LCMX02 LCMX02 1200 MACHXO2 7000 pinout file LCMXO2 640HC LCMXO2-4000HC LCMXO2-1200HC-4TG100C LCMXO2-7000HC MachXO2 LCMXO2-1200HC-4MG132C
Contextual Info: MachXO2 Family Data Sheet DS1035 Version 01.9, April 2012 MachXO2 Family Data Sheet Introduction March 2012 Features Data Sheet DS1035  Flexible On-Chip Clocking • Eight primary clocks • Up to two edge clocks for high-speed I/O  interfaces top and bottom sides only