GA1086 Search Results

MQUAD

Abstract: 1110E GA1086 GA1086-MC1000 GA1086-MC500 MC500 avw 13
Contextual Info: T R I Q U I N T S E M I C O N D U C T O R , I N C 7Q gt GA1086 Figure 1. Block Diagram 11-Output dock Buffer Features • Operates from 30 MHz to 67MHz • Pin-to-pin output skew of 250 ps max • Period-to-period jitter: 75 ps (typ) microprocessors, with near zero input-to-output delay and very low pin-to-

ga1000

Contextual Info: s CO M PU TIN G AND e m I c o n D U S1 T 0 R , I N C NETW ORKING Figure 1. Block Diagram FBIN C C LK SO NC NC GN D GA1086 11-Output Clock Buffer Features * Operates from 30 MHz to 67 MHz a Pin-to-pin output skew of 250ps max * Period-to-period jitter: 75 ps (typ)

Contextual Info: ICS9176 Integrated Circuit Systems, Inc. Low Skew Output Buffer General Description Features ICS9176-01 is pin compatible with Triquint GA1086 The ICS9176 is designed specifically to support the tight timing requirements of high-performance microprocessors and

TriQuint

Contextual Info: T fl ! COMPUTING I AND ! T S E M I C O N D U C T O R , NETWORKING Figure 1. Block Diagram FBIN S1 I N C C LK SO NC NC GND GA1086 11-Output Data Sheets Clock Buffer Features • Operates from 30 MHz to 67 MHz • Pin-to-pin output skew o f 250 ps max) • Period-to-period jitter: 75 ps (typ)

Contextual Info: Integrated Circuit Systems,Inc. ICS9176 Advance Information Low Skew Output Buffer Features • ICS9176-01 is pin compatible with Triquint GA1086 • ±500 ps skew max between input and outputs • +250 ps skew (max) between outputs • 10 symmetric, TTL-compatible outputs

BA1000

Abstract: U902 gal 504 GA1086 GA1086-MC500 MC500
Contextual Info: f H / Q U l fi r\ S E M I C O N D U C T O R , I N C T O S I COMPUTING AND NETWORKING Figure 1. Block Diagram FBIN S1 CLK SO NC NC GA1086 GND VDD Q9 11-Output Clock Buffer Q8 GND Features \ Q7 * Operates from 30 MHz to 67 MHz '• Q6 a Pin-to-pin output skew of

Contextual Info: T R I COMPUTING Q U AND I N T S E M I C O N D U C T O R , NETWORKING Figure 1. Block Diagram FBIN S1 I N C C LK SO NC NC GA1086 GND Features I • Operates from 30 MHz to 67 MHz ■ ■ Pin-to-pin output skew o f 2 5 0 ps max ■ Period-to-period jitter: 75 ps (typ)

Contextual Info: T R I 7 Q Q U I N T S E M I C O N D U C T O R , I N C Ö Figure 1. Block Diagram FBIN GA1086 S1 C LK SO NC NC GND 11-Output Clock Buffer Features • Operates from 30 MHz to 67 MHz • Pin-to-pin output skew of 250 p s max • TriQuint’s GA1086 operates from 30 MHz to 67 MHz. This TTL-level clock

Contextual Info: ICS9176 Integrated Circuit Systems, Inc. Low Skew Output Buffer General Description Features ICS9176-01 is pin compatible with Triquint GA1086 ±500ps skew max between input and outputs ±250ps skew (max) between outputs 10 symmetric, TLL-compatible outputs

Contextual Info: System Timing Products 11-Output Clock Buffer The GA1086 output buffers are symmetric, each sourcing and sinking up to 30 mA of drive current. For diagnostic purposes, the device has a test mode which is used to test the device and associated logic by single-stepping

MC500

Abstract: GA1086 GA1086-MC1000 GA1086-MC500 MC1000 QT052 ga1000
Contextual Info: T R I Q U I N T S E M I C O N D U C T O R, I N C . GA1086 Figure 1. Block Diagram S2 FBIN S1 CLK S0 NC NC 11 10 9 8 7 6 12 5 4 VDD Phase Detector Control Logic VDD 13 GND 3 Q9 2 Q8 11-Output Clock Buffer VCO Q/2 14 FBOUT 16 MUX Q1 17 1 GND Precision Output

Contextual Info: S E M I C C N D U C T O R I N C :i: Figure 1. Block Diagram FBIN S1 CLK SO NC NC GND GA1086 11-Output Clock Buffer Features * Operates from 30 MHz to 67 MHz * Pin-to-pin output skew o f 2 5 0 ps max TriQuint’s GA1086 operates from 30 MHz to 67 MHz. This TTL-level clock buffer chip

Contextual Info: S E M I C O N D U C T O R , AND NETWORKING Section 2 - Data Sheets Data Sheets COMPUTING I N C GA1000 Custom Clock Generator. 2-3 GA1085 11-Output Configurable Clock B uffe r. 2-19

Contextual Info: ICS9176 Integrated Circuit Systems, Inc. Low Skew Output Buffer General Description Features The IC S9176 is designed specifically to support the tight timing requirem ents o f high-perform ance m icroprocessors and chip sets. Because the jitter o f the device is lim ited to ±25 ps,

Contextual Info: ICS9176 Integrated Circuit Systems, Inc. Low Skew Output Buffer General Description Features the ICS9176 is designed specifically to support the tight timing requirements of high-performance microprocessors and chip sets. Because the jitter of the device is limited to

ICS9176C-03

Abstract: ICS9176CM-03 ICS9176CQ-03
Contextual Info: Integrated Circuit Systems, Inc. ICS9176C-03 Low Skew Output Buffer General Description The IC9176C-03 is designed specifically to support the tight timing requirements of high-performance microprocessors and chip sets. Because the jitter of the device is limited to ±250ps,

ics9176-01

Abstract: TriQuint Semiconductor GA1086 J-10
Contextual Info: ICS9176 Integrated Circuit Systems, Inc. Low Skew Output Buffer General Description Features The ICS9176 is designed specifically to support the tight timing requirements of high-performance microprocessors and chip sets. Because the jitter of the device is limited to ±250ps,

NEC 2532

Abstract: cache controller intel 82496 Voltage Doubler with 555 circuit ICS2686 AP-453 82491 IC 7418 intel 82496 TTL 7400 national semiconductor 241563
Contextual Info: AP-479 APPLICATION NOTE Pentium Processor Clock Design November 1995 Order Number 241574-002 Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or copyright for sale and use of Intel products except as provided in

IS5001

Abstract: GA1086 GA1086-MC1000 GA1086-MC500 MC1000 cto150 GA1000
Contextual Info: T R I Q U I N S E M I T C O N D U C T 0 R , I N C . 7 Q $ f AND N ETW O RKIN G Figure 1. Block Diagram FBIN S1 CLK r n n n r im S2 12 VDD 13 0/2 SO NC r r i m NC m m a Phase Detector Control Logic Q9 E 11-Output Clock Buffer Q8 Divide Logic GND FB0Ulj^6 VDD

ICS9176CM-03

Abstract: ICS9176C-03 MS-013 MO-119 9176C
Contextual Info: Integrated Circuit Systems, Inc. ICS9176C-03 Low Skew Output Buffer General Description The IC9176C-03 is designed specifically to support the tight timing requirements of high-performance microprocessors and chip sets. Because the jitter of the device is limited to ±250ps, the ICS9176C-03 is ideal for

ics9176-01

Abstract: GA1086 ICS9176M-01 ICS9176Q-01
Contextual Info: ICS9176-01 Integrated Circuit Systems, Inc. Low Skew Output Buffer General Description Features the ICS9176-01 is designed specifically to support the tight timing requirements of high-performance microprocessors and chip sets. Because the jitter of the device is limited to

Contextual Info: T R I 7 Q Q U £ I N T S E M I C O N D U C T O R , I N C t G A 1086 Figure 1. Block D iag ram FBIN S1 C LK SO NC NC GND 11-Output Clock Buffer Features TriQ u in t’s G A 1 0 8 6 operates from 30 MHz to 67 MHz. T h is T T L -le v e l clock buffer chip su ppo rts the tight tim ing requ irem en ts of high-p erform ance

GA1086

Abstract: ICS9176-01 ICS9176M-01 ICS9176Q-01
Contextual Info: ICS9176 Integrated Circuit Systems, Inc. Low Skew Output Buffer General Description Features the ICS9176 is designed specifically to support the tight timing requirements of high-performance microprocessors and chip sets. Because the jitter of the device is limited to

Contextual Info: Section 2 •Data Sheets GA1085 11-Output Configurable Clock B u ffe r. 2-3 GA1087 11-Output Configurable Clock B u ffe r. 2-13 GA1088 11-Output Configurable Clock B u ffe r. 2-23