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    M74HC165B1

    Abstract: M74HC165C1R M74HC165 M54HC165 M54HC165F1R M74HC165B1R M74HC165M1R 74HC165 logic diagram
    Text: M54HC165 M74HC165 8 BIT PISO SHIFT REGISTER . . . . . . . . HIGH SPEED tPD = 15 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS BALANCED PROPAGATION DELAYS tPLH = tPHL SYMMETRICAL OUTPUT IMPEDANCE


    Original     		PDF M54HC165 M74HC165 54/74LS165 M54HC165F1R M74HC165M1R M74HC165B1R M74HC165C1R M54/74HC165 M74HC165B1 M74HC165C1R M74HC165 M54HC165 M54HC165F1R M74HC165B1R M74HC165M1R 74HC165 logic diagram

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    Abstract: No abstract text available
    Text: r z 7 S G S -1 H 0 M S 0 N Ä T# M 5 4 H C i 65 M74HC165 8 BIT PISO SH IFT REGISTER • HIGH SPEED tPD = 15 ns TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Icc = 4 |XA (MAX.) AT T a = 25 °C ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ■ BALANCED PROPAGATION DELAYS


    OCR Scan     		PDF M74HC165 54/74LS165 M54HC165F1R M74HC165M1R M74HC165B1R M74HC165C1R DD54b51 M54/M74HC165 00SMhS2