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VPG Transducers MAX128K00B RES 128K OHM 0.1% 1/5W RADIAL
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	MAX128K00B	Bulk			20	1 - 10 - 100 $17.05 1000 $17.05 10000 $17.05	Buy Now
Avnet Americas	MAX128K00B	Bulk		111 Weeks	20	1 - 10 - 100 $14.49 1000 $14.27 10000 $14.27	Buy Now
Vishay Precision Group Inc MAX128K00B Metal Foil Resistors - Through Hole MAX128K00B 5 PPM
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Mouser Electronics	MAX128K00B					1 $24.24 10 $17.05 100 $15.02 1000 $14.86 10000 $14.86	Get Quote

X128K Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
MB81141622 Abstract: B81141622-015 MB8114 Contextual Info: FUJITSU S E MI CONDUCT OR DATA S H E E T D S 0 5 - 11011 -1 E MEMORY CMOS 2 X128K X 16 SYNCHRONOUS DRAM MB81141622-012/-015 C M O S 2 BANKS OF 1 3 1 ,072 -WOR DS x 16-BIT S Y N C H R O N O U S DYNA MIC RA ND OM A C C E S S ME M OR Y •DESCRI PTI ON The Fujitsu M B81141 622 is a CM OS Synch ron ou s Dynamic Random Access Memory SDRAM ^&bntain in g 4,1 94,304 m em ory	OCR Scan	X128K MB81141622-012/-015 16-BIT B81141 B81141622 MB81141622 B81141622-015 MB8114	PDF
VP510 Abstract: VP520 VP520S DS3487 H261 VP2611 VP2612 VP2614 VP2615 PAL colour coder block diagram Contextual Info: VP2611 VP2611 H.261 Encoder Supersedes June 1996 edition, DS3487 - 4.0 DS3487 - 4.1 December 1998 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz frame rates ■ Inputs YUV data in 8 x 8 sub block format	Original	VP2611 DS3487 VP2611 VP510 VP520 VP520S H261 VP2612 VP2614 VP2615 PAL colour coder block diagram	PDF
H.261 encoder chip Abstract: AN206 CCIR601 G711 T120 VP2611 VP2612 VP2614 VP2615 VP520 Contextual Info: AN206 An Overview of the H.261 Application Note AN206 - 1.1 October 1995 THE REQUIREMENT H.261 is an ITU recommendation concerned with providing an international standard for video codecs which will allow inter regional compatibility for video telephony. The	Original	AN206 AN206 H.261 encoder chip CCIR601 G711 T120 VP2611 VP2612 VP2614 VP2615 VP520	PDF
Contextual Info: VP2611 VP2611 H.261 Encoder Supersedes June 1996 edition, DS3487 - 4.0 DS3487 - 4.1 December 1998 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz frame rates ■ Inputs YUV data in 8 x 8 sub block format	Original	VP2611 DS3487 VP2611	PDF
SC34350 Abstract: 671-8039 Contextual Info: SQ3480 V.34 Plug and Play M odem Chip Set SIERRA SEMICONDUCTOR FAX PnP I 1 Data Modes: ITU-T formerly CCITT V.34, V.32bis, V.32, V.22bis, V.22, V.21, Bell 212A, 103 and Bell 202 Rec. (CID) _ Data Rates: 115,200 to 300 b it/s —I "AJ" Command Set n Error Control: V.42 and MNP	OCR Scan	SQ3480 SQ3480 32bis, 22bis, 42bis 27ter. fl242DlD SC34350 671-8039	PDF
DS3487 Abstract: H261 VP2611 VP2612 VP2614 VP2615 VP510 VP520 VP520S Contextual Info: Obsolescence Notice This product is obsolete. This information is available for your convenience only. For more information on Zarlink’s obsolete products and replacement product lists, please visit http://products.zarlink.com/obsolete_products/ VP2611 VP2611	Original	VP2611 DS3487 H261 VP2611 VP2612 VP2614 VP2615 VP510 VP520 VP520S	PDF
DS3487 Abstract: H261 VP2611 VP2612 VP2614 VP2615 VP510 VP520 VP520S Contextual Info: VP2611 VP2611 H.261 Encoder Supersedes June 1996 edition, DS3487 - 4.0 DS3487 - 4.1 December 1998 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz frame rates ■ Inputs YUV data in 8 x 8 sub block format	Original	VP2611 DS3487 VP2611 H261 VP2612 VP2614 VP2615 VP510 VP520 VP520S	PDF
DS3487 Abstract: H261 VP2611 VP2612 VP2614 VP2615 VP510 VP520 VP520S Contextual Info: VP2611 VP2611 H.261 Encoder Supersedes June 1996 edition, DS3487 - 4.0 DS3487 - 4.1 December 1998 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz frame rates ■ Inputs YUV data in 8 x 8 sub block format	Original	VP2611 DS3487 VP2611 H261 VP2612 VP2614 VP2615 VP510 VP520 VP520S	PDF
DS3487 Abstract: H261 VP2611 VP2612 VP2614 VP2615 VP510 VP520 VP520S 1996 yuv rgb conversion frame buffer Contextual Info: VP2611 VP2611 H.261 Encoder Supersedes June 1996 edition, DS3487 - 4.0 DS3487 - 4.1 December 1998 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz frame rates ■ Inputs YUV data in 8 x 8 sub block format	Original	VP2611 DS3487 VP2611 H261 VP2612 VP2614 VP2615 VP510 VP520 VP520S 1996 yuv rgb conversion frame buffer	PDF
H.261 decoder chip Abstract: H.261 encoder chip combined video Videophone Contextual Info: AN206 An Overview of the H.261 Application Note AN206 - 1.1 October 1995 THE REQUIREMENT H.261 is an ITU recommendation concerned with providing an international standard for video codecs which will allow inter regional compatibility for video telephony. The	Original	AN206 AN206 H.261 decoder chip H.261 encoder chip combined video Videophone	PDF
Contextual Info: VP2611 JANUARY 1996 ADVANCE INFORMATION DS3478 - 3.0 VP2611 H.261 ENCODER Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz frame rates	Original	VP2611 DS3478 HB3923-2) VP2611	PDF
combined video Abstract: H.261 decoder chip of4801 Contextual Info: AN206 An Overview of the H.261 Application Note AN206 - 1.1 October 1995 THE REQUIREMENT H.261 is an ITU recommendation concerned with providing an international standard for video codecs which will allow inter regional compatibility for video telephony. The	Original	AN206 AN206 combined video H.261 decoder chip of4801	PDF