VP2615 Search Results

Contextual Info: VP2615 JANUARY 1996 ADVANCE INFORMATION DS3479 - 3.0 VP2615 H.261 DECODER Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 FEATURES DESCRIPTION • Inputs run length coded transform data ■ Outputs 8 bit pixels in YUV block format

Contextual Info: VP2615 M ITEL _ H.261 Decoder SE M IC O N D U C T O R Supersedes January 1996 edition, DS3479 - 3.0 DS3479 - 4.0 June 1996 FEATURES DESCRIPTION • Inputs run length coded transform data ■ Outputs 8 bit pixels in YUV block format The V P2615 decoder forms part of a chip set for use in

VP510

Contextual Info: VP2615 VP2615 H.261 Decoder Supersedes January 1996 edition, DS3479 - 3.0 DS3479 - 4.0 June 1996 FEATURES DESCRIPTION • Inputs run length coded transform data ■ Outputs 8 bit pixels in YUV block format ■ Up to full CIF resolution and 30 Hz frame rates

Contextual Info: Si GEC PLESSEY S E M I C O N D U C T O R S D S 3 4 7 9 - 4.0 VP2615 H .261 DECODER Supersedes January 1996 Edition, DS3479-3.0 FEATURES DESCRIPTION Inputs run length coded transform data O u tp u ts 8 bit pixels in YU V block form at U p to fu ll C IF resolution and 30 Hz fram e rates

Contextual Info: SK 11 i f r’J3 C ' T* P ï F < J Ç P Y JUNE 1993 3:5 S E M I PRELIMINARY INFORMATION C O N D U C T O R S DS3479 - 1.9 VP2615 H.261 DECODER FEATURES DESCRIPTION H Inputs run length coded transform data • Outputs 8 bit pixels in YUV block format The VP2615 decoder forms part of a chip set for use in

fs14 diode

Abstract: H261 VP2611 VP2612 VP2614 VP2615 VP510 VP520 VP520S 48 fs15
Contextual Info: Obsolescence Notice This product is obsolete. This information is available for your convenience only. For more information on Zarlink’s obsolete products and replacement product lists, please visit http://products.zarlink.com/obsolete_products/ VP2615 VP2615

fs15 diode

Abstract: fs14 diode 57 fs15 diode fs12 diode H261 VP2611 VP2612 VP2614 VP2615 VP510
Contextual Info: VP2615 VP2615 H.261 Decoder Supersedes January 1996 edition, DS3479 - 3.0 DS3479 - 4.0 June 1996 FEATURES DESCRIPTION • Inputs run length coded transform data ■ Outputs 8 bit pixels in YUV block format ■ Up to full CIF resolution and 30 Hz frame rates

Contextual Info: @ VP2615 M IT E L H.261 Decoder S E M IC O N D U C T O R DS3479 - 4.0 June 1996 Supersedes January 1996 edition, DS3479 - 3.0 FEATURES DESCRIPTION • Inputs run length coded transform data ■ Outputs 8 bit pixels In YUV block format ■ Up to full CIF resolution and 30 Hz frame rates

fs5 06

Abstract: H261 VP2611 VP2612 VP2614 VP2615 VP510 VP520 VP520S
Contextual Info: VP2615 VP2615 H.261 Decoder Supersedes January 1996 edition, DS3479 - 3.0 DS3479 - 4.0 June 1996 FEATURES DESCRIPTION • Inputs run length coded transform data ■ Outputs 8 bit pixels in YUV block format ■ Up to full CIF resolution and 30 Hz frame rates

Contextual Info: 37bflS2B □ □ n b ? b 4 ^ H P L S B Si GEC PL ES S EY S I M I C O N I PRELIMINARY INFORMATION 11 DS3479- 1.9 VP2615 H.261 DECODER FEATURES DESCRIPTION • Inputs run length coded transform data ■ Outputs 8 bit pixels in YUV block format B Up to full CIF resolution and 30 Hz frame rates

fs14 diode

Abstract: fs13 05
Contextual Info: VP2615 VP2615 H.261 Decoder Supersedes January 1996 edition, DS3479 - 3.0 DS3479 - 4.0 June 1996 FEATURES DESCRIPTION • Inputs run length coded transform data ■ Outputs 8 bit pixels in YUV block format ■ Up to full CIF resolution and 30 Hz frame rates

VP520

Abstract: VP520S H261 VP2611 VP2612 VP2614 VP2615 VP510 48 fs15 diode fs15 diode
Contextual Info: VP2615 VP2615 H.261 Decoder Supersedes January 1996 edition, DS3479 - 3.0 DS3479 - 4.0 June 1996 FEATURES DESCRIPTION • Inputs run length coded transform data ■ Outputs 8 bit pixels in YUV block format ■ Up to full CIF resolution and 30 Hz frame rates

fs15 diode

Abstract: 48 fs15 diode fs14 diode H261 VP2611 VP2612 VP2614 VP2615 VP510 VP520
Contextual Info: VP2615 VP2615 H.261 Decoder Supersedes January 1996 edition, DS3479 - 3.0 DS3479 - 4.0 June 1996 FEATURES DESCRIPTION • Inputs run length coded transform data ■ Outputs 8 bit pixels in YUV block format ■ Up to full CIF resolution and 30 Hz frame rates

Contextual Info: a i GEC PLESSEY SEPTEMBER 1994 ADVANCE INFORMATION SEMICONDUCTORS DS3479 - 2.3 VP2615 H.261 DECODER Supersedes version in December 1993 Digital Video & D S P 1C Handbook. HB3923-1 FEATURES DESCRIPTION Inputs run length coded transform data Outputs 8 bit pixels in YUV block format

H261

Abstract: VP2611 VP2612 VP2614 VP2615 VP510 VP520S
Contextual Info: VP2614 VP2614 H.261 Video De-Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 DS3735 - 3.2 October 1996 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run

F54 ONS

Contextual Info: P S H G E C PLESSEY ADVANCE INFORMATION DS3507-1.6 VP510 Bl DIRECTIONAL COLOUR SPACE CONVERTER DESCRIPTION FEATURES B B B B B B User definable colour space conversion Sampling rates up to 27 MHz On chip decimating or interpolating FIR filters Conversion from 24 bit inputs to 16 bit outputs or vice

Contextual Info: P S G E C p l e s s e y DS3735 • 3.2 VP2614 H.261 VIDEO DE-MULTIPLEXER Supersedes version in June 1995 Digital Video & DSP 1C Handbook, HB3923-2 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run

Contextual Info: SEPTEMBER 1994 ADVANCE INFORMATION DS3511 - 2.2 VP2612 VIDEO MULTIPLEXER Supersedes version in December 1993 Digital Video & DSP IC Handbook, HB3923-1 FEATURES • Fully integrated H261 video multiplexer ■ Inputs data direct from VP2611 source coder ■

Contextual Info: VP2614 DS3735 - 3.2 VP2614 H.261 VIDEO DE-MULTIPLEXER Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run

H261

Abstract: VP2611 VP2612 VP2614 VP2615 VP510 VP520S
Contextual Info: VP2614 VP2614 H.261 Video De-Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 DS3735 - 3.2 October 1996 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run

VP510

Abstract: VP520 VP520S DS3487 H261 VP2611 VP2612 VP2614 VP2615 PAL colour coder block diagram
Contextual Info: VP2611 VP2611 H.261 Encoder Supersedes June 1996 edition, DS3487 - 4.0 DS3487 - 4.1 December 1998 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz frame rates ■ Inputs YUV data in 8 x 8 sub block format

Contextual Info: VP2611 @ M ITEL H.261 Encoder SE M IC O N D U C T O R Supersedes January 1996 edition, DS3487 - 3.0 DS3487 - 4.0 June 1996 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz frame rates ■ Inputs YUV data in 8 x 8 sub block format

H.261 encoder chip

Abstract: AN206 CCIR601 G711 T120 VP2611 VP2612 VP2614 VP2615 VP520
Contextual Info: AN206 An Overview of the H.261 Application Note AN206 - 1.1 October 1995 THE REQUIREMENT H.261 is an ITU recommendation concerned with providing an international standard for video codecs which will allow inter regional compatibility for video telephony. The

H261

Abstract: VP2611 VP2612 VP2614 VP2615 VP510 VP520S
Contextual Info: VP2614 VP2614 H.261 Video De-Multiplexer Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 DS3735 - 3.2 October 1996 FEATURES DESCRIPTION • Fully integrated H.261 video de-multiplexer ■ Inputs an H.261 bitstream. Outputs error corrected run